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| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2019-07-10 14:34:50 +0200 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2019-07-11 15:14:32 +0000 |
| commit | 6c7857411c9a7572f5bdb29cc6e1ffd01d023cb2 (patch) | |
| tree | 986cf393097d1b9810d179544c3952e5bffb5760 /src/cpu/amd/agesa | |
| parent | 1f21a96c842c285308fd0b433a578ce101483aa1 (diff) | |
mb/siemens/{baseboard,mc_apl3,mc_apl4,mc_apl5}: Fix GPIO_168
This GPIO is corrected with reference to the Apollo Lake SoC EDS Vol 4
revision 2.4 chapter 10.1.2.3 List of Pins that are GPIOs but cannot be
used in Function 0 (GPIO) mode.
Change-Id: I98628ade3a1e19730ca6e6b4a63c28e6816176ce
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34197
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/cpu/amd/agesa')
0 files changed, 0 insertions, 0 deletions