diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2021-10-28 10:58:59 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-11-03 18:32:49 +0000 |
| commit | ca87532a07c65277003fd3c04d5e4429c31afad7 (patch) | |
| tree | 70d5227552b09460029447d51eb05f8e68455a93 /src/cpu/amd/agesa/family15tn | |
| parent | 0a36178fa401508b6762b26d615ffe0d6344a88d (diff) | |
cpu/amd/mtrr/amd_mtrr.c: Remove unused functions
AGESA sets up MTRRs so these functions are now unused.
Change-Id: Ic2bb36d72944ac86c75c163e130f1eb762a7ca37
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/58689
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/cpu/amd/agesa/family15tn')
| -rw-r--r-- | src/cpu/amd/agesa/family15tn/model_15_init.c | 7 |
1 files changed, 4 insertions, 3 deletions
diff --git a/src/cpu/amd/agesa/family15tn/model_15_init.c b/src/cpu/amd/agesa/family15tn/model_15_init.c index 245cdf34f9..d13fb9b135 100644 --- a/src/cpu/amd/agesa/family15tn/model_15_init.c +++ b/src/cpu/amd/agesa/family15tn/model_15_init.c @@ -25,9 +25,10 @@ static void model_15_init(struct device *dev) u32 siblings; #endif - //enable_cache(); - //amd_setup_mtrrs(); - //x86_mtrr_check(); + /* + * AGESA sets the MTRRs main MTRRs. The shadow area needs to be set + * by coreboot. + */ disable_cache(); /* Enable access to AMD RdDram and WrDram extension bits */ msr = rdmsr(SYSCFG_MSR); |