diff options
author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2016-11-23 06:47:15 +0200 |
---|---|---|
committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2017-04-05 15:02:43 +0200 |
commit | ba22e159bb21549ba92eb6e9d91eaa097a54985b (patch) | |
tree | b9195d45d7e01b7f4dbe4a646ff5c274d6e1d53c /src/cpu/amd/agesa/family15tn | |
parent | 1779d534e5b6e01e2aabfb30aa369e0aebe28488 (diff) |
AGESA: Disable CAR with empty stack
Calling disable_cache_as_ram() with valuables in stack is not
a stable solution, as per documentation AMD_DISABLE_STACK
should destroy stack in cache.
Change-Id: I986bb7a88f53f7f7a0b05d4edcd5020f5dbeb4b7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/18626
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/amd/agesa/family15tn')
-rw-r--r-- | src/cpu/amd/agesa/family15tn/romstage.c | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/src/cpu/amd/agesa/family15tn/romstage.c b/src/cpu/amd/agesa/family15tn/romstage.c index 55bb4b1f23..fc1aeee576 100644 --- a/src/cpu/amd/agesa/family15tn/romstage.c +++ b/src/cpu/amd/agesa/family15tn/romstage.c @@ -15,9 +15,6 @@ * GNU General Public License for more details. */ -#include <arch/stages.h> -#include <cpu/amd/agesa/s3_resume.h> - #include <console/console.h> #include <cpu/amd/car.h> @@ -45,28 +42,32 @@ void agesa_main(struct sysinfo *cb) agesawrapper_amdinitearly(); if (!cb->s3resume) { + printk(BIOS_INFO, "Normal boot\n"); + post_code(0x40); agesawrapper_amdinitpost(); - - post_code(0x41); - agesawrapper_amdinitenv(); - - disable_cache_as_ram(); } else { printk(BIOS_INFO, "S3 detected\n"); post_code(0x60); agesawrapper_amdinitresume(); + } +} - amd_initcpuio(); - agesawrapper_amds3laterestore(); +void agesa_postcar(struct sysinfo *cb) +{ + if (!cb->s3resume) { + printk(BIOS_INFO, "Normal boot postcar\n"); - post_code(0x61); - prepare_for_resume(); - } + post_code(0x41); + agesawrapper_amdinitenv(); + } else { + printk(BIOS_INFO, "S3 resume postcar\n"); - post_code(0x50); - copy_and_run(); + post_code(0x61); + amd_initcpuio(); - /* Not reached */ + post_code(0x62); + agesawrapper_amds3laterestore(); + } } |