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authorElyes Haouas <ehaouas@noos.fr>2022-05-29 15:44:11 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-07-19 17:28:32 +0000
commit287048a500c44d1880d8def8c42ade83046a687d (patch)
tree9c1e3e109f000dfb58f7206609aefc1d2e13bc2d /src/cpu/amd/agesa/family14
parenta3214c050e212d89dcc244741351e0fb715520e0 (diff)
cpu/amd: Reformat code
Most of these changes are suggested by clang-format(13.0-54) tool on Debian testing. Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Change-Id: Ie4fe0e872e94f38079945970848fefd153ab7cb5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64782 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@tutanota.com>
Diffstat (limited to 'src/cpu/amd/agesa/family14')
-rw-r--r--src/cpu/amd/agesa/family14/fixme.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/family14/fixme.c b/src/cpu/amd/agesa/family14/fixme.c
index 16caf40f15..4c16cc32ac 100644
--- a/src/cpu/amd/agesa/family14/fixme.c
+++ b/src/cpu/amd/agesa/family14/fixme.c
@@ -39,7 +39,7 @@ void amd_initcpuio(void)
LibAmdMsrRead(TOP_MEM, &MsrReg, &StdHeader);
MsrReg = (MsrReg >> 8) | 3;
PciAddress.AddressValue = MAKE_SBDFO(0, 0, 0x18, 1, 0x88);
- PciData = (UINT32) MsrReg;
+ PciData = (UINT32)MsrReg;
LibAmdPciWrite(AccessWidth32, PciAddress, &PciData, &StdHeader);
/* Send all IO (0000-FFFF) to southbridge. */