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authorKyösti Mälkki <kyosti.malkki@gmail.com>2016-11-21 07:37:13 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2017-04-05 15:00:23 +0200
commit13cf13587192ff82fbb3d060fe49fc677464c83b (patch)
tree231735af14e9c213ac7479ad5b832e4e5796b703 /src/cpu/amd/agesa/family12/romstage.c
parentb85ddc787ee2e82712b95b2eb3b90f4b56698e41 (diff)
AGESA: Move amd_initmmio() call
Function enables PCI MMCONF and XIP cache, it needs to be called before giving platform any chance of calling any PCI access functions. Change-Id: Ic044d4df7b93667fa987c29c810d0bd826af87ad Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/18623 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/cpu/amd/agesa/family12/romstage.c')
-rw-r--r--src/cpu/amd/agesa/family12/romstage.c6
1 files changed, 5 insertions, 1 deletions
diff --git a/src/cpu/amd/agesa/family12/romstage.c b/src/cpu/amd/agesa/family12/romstage.c
index 4fb2e685a7..67108b9093 100644
--- a/src/cpu/amd/agesa/family12/romstage.c
+++ b/src/cpu/amd/agesa/family12/romstage.c
@@ -35,13 +35,17 @@
#include <arch/cpu.h>
#include "platform_cfg.h"
+void asmlinkage early_all_cores(void)
+{
+ amd_initmmio();
+}
+
void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
{
struct sysinfo *cb = NULL;
u32 val;
post_code(0x35);
- amd_initmmio();
if (!cpu_init_detectedx && boot_cpu()) {
post_code(0x30);