diff options
| author | zbao <fishbaozi@gmail.com> | 2012-04-13 13:42:15 +0800 |
|---|---|---|
| committer | Marc Jones <marcj303@gmail.com> | 2012-04-16 18:22:47 +0200 |
| commit | f72237346d9a0894b4675f0b6915da6fdcccd31e (patch) | |
| tree | 3ccf4333bd94f38a68f3b76d3f161d27072316b5 /src/cpu/amd/agesa/cache_as_ram.inc | |
| parent | caf494c83170e97b192e2174bc461482699a3712 (diff) | |
S3 code in coreboot public folder.
1. Move the Stack to high memory.
2. Restore the MTRR before Coreboot jump to the wakeup vector.
Change-Id: I9872e02fcd7eed98e7f630aa29ece810ac32d55a
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/623
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/cpu/amd/agesa/cache_as_ram.inc')
| -rwxr-xr-x | src/cpu/amd/agesa/cache_as_ram.inc | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/cache_as_ram.inc b/src/cpu/amd/agesa/cache_as_ram.inc index f328db405e..2124bf3be8 100755 --- a/src/cpu/amd/agesa/cache_as_ram.inc +++ b/src/cpu/amd/agesa/cache_as_ram.inc @@ -86,6 +86,13 @@ disable_cache_as_ram: /* Save return stack */ movd %esp, %xmm0 + /* Disable cache */ + movl %cr0, %eax + orl $(1 << 30), %eax + movl %eax, %cr0 + + invd + AMD_DISABLE_STACK /* Restore the return stack */ |