diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-10-21 18:22:32 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-11-20 19:02:37 +0100 |
| commit | e4c17ce8036ae247f5e73c37789a9181e7cbd3c7 (patch) | |
| tree | 47f6bd7cb995f7c1c33a8e4bc52034cee3b3471d /src/cpu/amd/agesa/amd_late_init.c | |
| parent | 84693d3dd40bdb291ec8dd92f99a4349da0db62b (diff) | |
AMD: Isolate AGESA and PI build environments
To backport features introduced with recent Chromebooks and/or Intel
boards in general, heavy work on the AMD AGESA platform infrastructure
is required. With the AGESA PI available in binary form only, community
members have little means to verify, debug and develop for the said
platforms.
Thus it makes sense to fork the existing agesawrapper interfaces, to give
AMD PI platforms a clean and independent sandbox. New directory layout
reflects the separation already taken place under 3rdparty/ and vendorcode/.
Change-Id: Ib60861266f8a70666617dde811663f2d5891a9e0
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/7149
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/cpu/amd/agesa/amd_late_init.c')
| -rw-r--r-- | src/cpu/amd/agesa/amd_late_init.c | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/cpu/amd/agesa/amd_late_init.c b/src/cpu/amd/agesa/amd_late_init.c index cab03a3096..4fa2e4e8bc 100644 --- a/src/cpu/amd/agesa/amd_late_init.c +++ b/src/cpu/amd/agesa/amd_late_init.c @@ -31,9 +31,6 @@ #include <sb_cimx.h> #endif -#define NORTHBRIDGE_00700F00 IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY_16KB) -#define NORTHBRIDGE_00730F01 IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_00730F01) - static void agesawrapper_post_device(void *unused) { if (acpi_is_wakeup_s3()) @@ -41,7 +38,7 @@ static void agesawrapper_post_device(void *unused) AGESAWRAPPER(amdinitlate); -#if (NORTHBRIDGE_00700F00) || (NORTHBRIDGE_00730F01) +#if IS_ENABLED(CONFIG_NORTHBRIDGE_AMD_AGESA_FAMILY_16KB) device_t dev; u32 value; dev = dev_find_slot(0, PCI_DEVFN(0, 0)); /* clear IoapicSbFeatureEn */ |