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author | zbao <fishbaozi@gmail.com> | 2012-04-13 13:42:15 +0800 |
---|---|---|
committer | Marc Jones <marcj303@gmail.com> | 2012-04-16 18:22:47 +0200 |
commit | f72237346d9a0894b4675f0b6915da6fdcccd31e (patch) | |
tree | 3ccf4333bd94f38a68f3b76d3f161d27072316b5 /src/cpu/amd/agesa/Makefile.inc | |
parent | caf494c83170e97b192e2174bc461482699a3712 (diff) |
S3 code in coreboot public folder.
1. Move the Stack to high memory.
2. Restore the MTRR before Coreboot jump to the wakeup vector.
Change-Id: I9872e02fcd7eed98e7f630aa29ece810ac32d55a
Signed-off-by: Zheng Bao <zheng.bao@amd.com>
Signed-off-by: zbao <fishbaozi@gmail.com>
Reviewed-on: http://review.coreboot.org/623
Tested-by: build bot (Jenkins)
Reviewed-by: Marc Jones <marcj303@gmail.com>
Diffstat (limited to 'src/cpu/amd/agesa/Makefile.inc')
-rw-r--r-- | src/cpu/amd/agesa/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc index fb536ddc53..696173daae 100644 --- a/src/cpu/amd/agesa/Makefile.inc +++ b/src/cpu/amd/agesa/Makefile.inc @@ -21,5 +21,7 @@ subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY12) += family12 subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY14) += family14 subdirs-$(CONFIG_CPU_AMD_AGESA_FAMILY15) += family15 +romstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c +ramstage-$(CONFIG_HAVE_ACPI_RESUME) += s3_resume.c ramstage-y += apic_timer.c cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc |