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| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-19 23:12:15 +0300 |
|---|---|---|
| committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-03 09:47:48 +0200 |
| commit | 005028e0a952b00b6184cdddf5905a1637029585 (patch) | |
| tree | 75bf8496298c783731502d9444a6a064d3e9203e /src/cpu/amd/agesa/Makefile.inc | |
| parent | e1b468e1a7cbea55108fb106105612e1f50c9487 (diff) | |
AGESA: Add agesawrapper_post_device()
NOTE: The procedure is moved across a collected timestamp
TS_WRITE_TABLES, so the delay of SPI erase/write will be accounted
for in an earlier entry in cbmem -t output.
Change-Id: I0f082e7af1769c8d7d03cdd51fdb5dacbf3402b4
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6132
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/cpu/amd/agesa/Makefile.inc')
| -rw-r--r-- | src/cpu/amd/agesa/Makefile.inc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/amd/agesa/Makefile.inc b/src/cpu/amd/agesa/Makefile.inc index 1f2966458b..beba040ef4 100644 --- a/src/cpu/amd/agesa/Makefile.inc +++ b/src/cpu/amd/agesa/Makefile.inc @@ -31,6 +31,7 @@ cpu_incs += $(src)/cpu/amd/agesa/cache_as_ram.inc romstage-y += heapmanager.c ramstage-y += heapmanager.c +ramstage-y += amd_late_init.c ifeq ($(CONFIG_HAVE_ACPI_RESUME), y) |