diff options
| author | Karthikeyan Ramasubramanian <kramasub@chromium.org> | 2018-12-05 22:48:08 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2018-12-07 11:38:30 +0000 |
| commit | 78ca711338141e20b80401d7ec71c5bd1e7eeaf6 (patch) | |
| tree | d15444b44bd1cef1fef634964e7fe858745c5ede /src/cpu/amd/agesa/Kconfig | |
| parent | 968a23d2e0afcf3ead23d3075aecc5c6e27211e4 (diff) | |
soc/intel/apollolake: Print ME version on exit of BS_DEV_INIT stage
Recently there has been a change to print ME version. But the stage at
which the version is printed causes the HECI device to remain in D0 state.
This in turn prevents the SoC from entering S0ix state.
This change moves printing ME version a little earlier so that the HECI
device is put into D0i3 state by FSP and the SoC can enter S0ix state
successfully.
BRANCH=octopus
BUG=b:120571529
TEST=Ensure that the ME version gets printed in BIOS logs. Ensure that
the device boots to ChromeOS. Ensure that the device enters S0ix
successfully(using suspend_stress_test -c 25).
Change-Id: I85bc45003a040c8347f929457792d78a9a077c6c
Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com>
Reviewed-on: https://review.coreboot.org/c/30074
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/cpu/amd/agesa/Kconfig')
0 files changed, 0 insertions, 0 deletions