arm(64): Replace write32() and friends with writel()

This patch is a raw application of the following spatch to the
directories src/arch/arm(64)?, src/mainboard/<arm(64)-board>,
src/soc/<arm(64)-soc> and src/drivers/gic:

@@
expression A, V;
@@
- write32(V, A)
+ writel(V, A)
@@
expression A, V;
@@
- write16(V, A)
+ writew(V, A)
@@
expression A, V;
@@
- write8(V, A)
+ writeb(V, A)

This replaces all uses of write{32,16,8}() with write{l,w,b}()
which is currently equivalent and much more common. This is a
preparatory step that will allow us to easier flip them all at once to
the new write32(a,v) model.

BRANCH=none
BUG=chromium:451388
TEST=Compiled Cosmos, Daisy, Blaze, Pit, Ryu, Storm and Pinky.

Change-Id: I16016cd77780e7cadbabe7d8aa7ab465b95b8f09
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 93f0ada19b429b4e30d67335b4e61d0f43597b24
Original-Change-Id: I1ac01c67efef4656607663253ed298ff4d0ef89d
Original-Signed-off-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/254862
Reviewed-on: http://review.coreboot.org/9834
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>

1 files changed, 7 insertions, 7 deletions

diff --git a/src/cpu/allwinner/a10/twi.c b/src/cpu/allwinner/a10/twi.c
index 2584126874..b5d9880847 100644
--- a/src/cpu/allwinner/a10/twi.c
+++ b/src/cpu/allwinner/a10/twi.c
@@ -42,7 +42,7 @@ static void configure_clock(struct a1x_twi *twi, u32 speed_hz)
 	/* Pre-divide the clock by 8 */
 	n = 3;
 	m = (apb_clk >> n) / speed_hz;
-	write32(TWI_CLK_M(m) | TWI_CLK_N(n), &twi->clk);
+	writel(TWI_CLK_M(m) | TWI_CLK_N(n), &twi->clk);
 }
 
 void a1x_twi_init(u8 bus, u32 speed_hz)
@@ -53,9 +53,9 @@ void a1x_twi_init(u8 bus, u32 speed_hz)
 	configure_clock(twi, speed_hz);
 
 	/* Enable the I²C bus */
-	write32(TWI_CTL_BUS_EN, &twi->ctl);
+	writel(TWI_CTL_BUS_EN, &twi->ctl);
 	/* Issue soft reset */
-	write32(1, &twi->reset);
+	writel(1, &twi->reset);
 
 	while (i-- && read32(&twi->reset))
 		udelay(1);
@@ -63,12 +63,12 @@ void a1x_twi_init(u8 bus, u32 speed_hz)
 
 static void clear_interrupt_flag(struct a1x_twi *twi)
 {
-	write32(read32(&twi->ctl) & ~TWI_CTL_INT_FLAG, &twi->ctl);
+	writel(read32(&twi->ctl) & ~TWI_CTL_INT_FLAG, &twi->ctl);
 }
 
 static void i2c_send_data(struct a1x_twi *twi, u8 data)
 {
-	write32(data, &twi->data);
+	writel(data, &twi->data);
 	clear_interrupt_flag(twi);
 }
 
@@ -90,7 +90,7 @@ static void i2c_send_start(struct a1x_twi *twi)
 	reg32 = read32(&twi->ctl);
 	reg32 &= ~TWI_CTL_INT_FLAG;
 	reg32 |= TWI_CTL_M_START;
-	write32(reg32, &twi->ctl);
+	writel(reg32, &twi->ctl);
 
 	/* M_START is automatically cleared after condition is transmitted */
 	i = TWI_TIMEOUT;
@@ -106,7 +106,7 @@ static void i2c_send_stop(struct a1x_twi *twi)
 	reg32 = read32(&twi->ctl);
 	reg32 &= ~TWI_CTL_INT_FLAG;
 	reg32 |= TWI_CTL_M_STOP;
-	write32(reg32, &twi->ctl);
+	writel(reg32, &twi->ctl);
 }
 
 static int i2c_read(struct a1x_twi *twi, uint8_t chip,