cpu/allwinner: Remove support

The Allwinner code was never completed and lacks a driver to load
romstage from the bootblock.

Change-Id: If2bae9e28a6e1ed6bfe0e9cb022ca410918cc4db
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/33133
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

1 files changed, 0 insertions, 42 deletions

diff --git a/src/cpu/allwinner/a10/ram_segs.h b/src/cpu/allwinner/a10/ram_segs.h
deleted file mode 100644
index fa915cd203..0000000000
--- a/src/cpu/allwinner/a10/ram_segs.h
+++ /dev/null
@@ -1,42 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2014  Alexandru Gagniuc <mr.nuke.me@gmail.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License or (at your option)
- * any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- *
- * How we use DRAM on Allwinner CPUs
- */
-
-#include <symbols.h>
-
-/*
- * Put CBMEM at top of RAM
- */
-static inline void *a1x_get_cbmem_top(void)
-{
-	return _dram + (CONFIG_DRAM_SIZE_MB << 20);
-}
-
-/*
- * By CBFS cache, we mean a cached copy, in RAM, of the entire CBFS region.
- */
-static inline void *a1x_get_cbfs_cache_top(void)
-{
-	/* Arbitrary 16 MiB gap for cbmem tables and bouncebuffer */
-	return a1x_get_cbmem_top() - (16 << 20);
-}
-
-static inline void *a1x_get_cbfs_cache_base(void)
-{
-	return a1x_get_cbfs_cache_top() - CONFIG_ROM_SIZE;
-}