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authorShuo Liu <shuo.liu@intel.com>2024-04-22 06:01:59 +0800
committerLean Sheng Tan <sheng.tan@9elements.com>2024-05-31 13:18:11 +0000
commiteaaa630e7d2c0bf742a877801070c8d81ced79dc (patch)
tree63c68adf4f91a16af6cb6dae54ea5b5cdc156520 /src/cpu/Makefile.mk
parentcf4c6fd225feb462cca38bf9b8ff9a7d55b09bc6 (diff)
soc/intel/xeon_sp: Add _OSC ASL generation utils for IIO domains
For multi-SKU/SoC supports, IIO domain layouts are returned from FSP HOBs. Add _OSC ASL generation utils so that static IIO domain layout definition file per SKU/SoC are not needed any more. The _OSC generation codes is a thin AML generation layer which further invokes \_SB.POSC which is defined in ASL. The ASL handler is able to handle boot-time generated info as parameters while keeps good readability for the ease of maintenance. In this case, firmware granted capabilities are calculated in boot time and passed to ASL handler as parameters. TEST=Build and boot on intel/archercity CRB Change-Id: Ibd3bfa2428725fe593754436d5ed75a3a11b4cdc Signed-off-by: Shuo Liu <shuo.liu@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/82034 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Christian Walter <christian.walter@9elements.com>
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