cpu/intel/fsp_model_206ax: Load microcode in coreboot

Intel's FSP 1.0 platforms are moving back to loading microcode in
coreboot instead of in the FSP.  Update the Ivy Bridge chips to
be compatible.

Change-Id: I4af155dea51e89ab9595b922c95ceade29a2dc52
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: http://review.coreboot.org/12196
Tested-by: build bot (Jenkins)
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: York Yang <york.yang@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>

0 files changed, 0 insertions, 0 deletions