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authorPatrick Georgi <patrick.georgi@coresystems.de>2009-09-25 18:43:02 +0000
committerPatrick Georgi <patrick.georgi@coresystems.de>2009-09-25 18:43:02 +0000
commit88f55b2c12f94fd0451902ee2edc663f12e401f4 (patch)
tree446179d449934a1dafeb2a2df44b8a515e380807 /src/cpu/Kconfig
parent6bb3bdf869ab06a972520c5a58c6fc9b7cfe99f4 (diff)
some progress on kconfig:
- northbridges are done - southbridges are done - Intel CPUs are done, with a design that the board only has to specify the socket it has, and the CPUs are pulled in automatically. There is some more cleanup possible in that area, but I'll do that later - a couple more mainboards compile: - intel/eagleheights - intel/jarrell - intel/mtarvon - intel/truxton - intel/xe7501devkit - sunw/ultra40 - supermicro/h8dme - tyan/s2850 - tyan/s2875 - via/epia - via/epia-cn - via/epia-m - via/epia-m700 - via/epia-n - via/pc2500e (PPC not considered, probably overlooked something) All of them only _build_, but some options are probably completely wrong. To be fixed later Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4673 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/Kconfig')
-rw-r--r--src/cpu/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index e70f021217..3d23f0c3db 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -17,6 +17,10 @@ config DCACHE_RAM_SIZE
hex
default 0x8000 if CPU_INTEL_CORE
+config DCACHE_RAM_GLOBAL_VAR_SIZE
+ hex
+ default 0
+
config SMP
bool
default y if MAX_CPUS != 1