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authorMyles Watson <mylesgw@gmail.com>2010-03-19 02:33:40 +0000
committerMyles Watson <mylesgw@gmail.com>2010-03-19 02:33:40 +0000
commit342619526c0e7bd084c6739782e4b332e01fa564 (patch)
tree84a934c096bf9e89e4e76e52d66ff32db049a76c /src/cpu/Kconfig
parent78acf932912669eb0eb7f7280da1b3c550035ebb (diff)
Get rid of a few warnings:
1. Add some more prototypes to lib.h 2. Include console.h when not using romcc 3. Eliminate an unused function 4. Set a default for SSE2, since it is just for ramtest performance Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5260 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/cpu/Kconfig')
-rw-r--r--src/cpu/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig
index c0cf76887f..8d7c1a39c4 100644
--- a/src/cpu/Kconfig
+++ b/src/cpu/Kconfig
@@ -48,6 +48,7 @@ config SSE
config SSE2
bool
+ default n
help
Select SSE2 in your socket or model Kconfig if your CPU has SSE2
streaming SIMD instructions. Some parts of coreboot can be built