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| author | Stefan Reinauer <reinauer@chromium.org> | 2012-07-10 17:02:21 -0700 |
|---|---|---|
| committer | Ronald G. Minnich <rminnich@gmail.com> | 2012-07-26 00:19:57 +0200 |
| commit | c65a36eb0f097ca13cdab8a787ce5cf35f49a64f (patch) | |
| tree | 60ccd686753137e1422b2b3a2546104fee8e765f /src/cpu/Kconfig | |
| parent | 79bbbd9db36d93a8a8a1b9d27ef32a69991e6b30 (diff) | |
Enable Microcode in CBFS for all SandyBridge/IvyBridge systems
Change-Id: Idee4facc18e0be60906d2a2f0e99bd39de8d7247
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/1332
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Tested-by: build bot (Jenkins)
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Diffstat (limited to 'src/cpu/Kconfig')
| -rw-r--r-- | src/cpu/Kconfig | 5 |
1 files changed, 1 insertions, 4 deletions
diff --git a/src/cpu/Kconfig b/src/cpu/Kconfig index f37bbf6755..baf686ea75 100644 --- a/src/cpu/Kconfig +++ b/src/cpu/Kconfig @@ -62,13 +62,10 @@ config SSE2 streaming SIMD instructions. Some parts of coreboot can be built with more efficient code if SSE2 instructions are available. -if CPU_INTEL_MODEL_206AX || CPU_INTEL_MODEL_306AX - config MICROCODE_IN_CBFS bool "Look for microcode in CBFS" + default n help Load microcode updates from CBFS instead of compiling them in. -endif - endif # ARCH_X86 |