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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-02-14 12:45:09 +0200 |
---|---|---|
committer | Patrick Georgi <patrick@georgi-clan.de> | 2014-04-09 11:29:45 +0200 |
commit | 4c686f2106a33e7a452bec163c178724a0313616 (patch) | |
tree | e47f615d45fe9ca7860fb60fc2951c53a16166f1 /src/console | |
parent | afa7b13b9355b3df3da7606d434cb8b450316ab9 (diff) |
OxPCIe uart: Split PCI bridge control
None of the PCI bridge management here is specific to the PCI UART
device/function. Also the Kconfig variable defaults are not globally
valid, fill samsung/lumpy with working values.
Change-Id: Id22631412379af1d6bf62c996357d36d7ec47ca3
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/5237
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/console')
-rw-r--r-- | src/console/console.c | 12 |
1 files changed, 10 insertions, 2 deletions
diff --git a/src/console/console.c b/src/console/console.c index 9e9e4e2556..348264d452 100644 --- a/src/console/console.c +++ b/src/console/console.c @@ -28,6 +28,11 @@ #include <arch/hlt.h> #include <arch/io.h> +#if CONFIG_EARLY_PCI_BRIDGE +/* FIXME: ROMCC chokes on PCI headers. */ +#include <device/pci.h> +#endif + #ifndef __PRE_RAM__ #include <string.h> #include <types.h> @@ -40,6 +45,9 @@ void console_init(void) if(get_option(&console_loglevel, "debug_level") != CB_SUCCESS) console_loglevel=CONFIG_DEFAULT_CONSOLE_LOGLEVEL; +#if CONFIG_EARLY_PCI_BRIDGE + pci_early_bridge_init(); +#endif for(driver = console_drivers; driver < econsole_drivers; driver++) { if (!driver->init) continue; @@ -101,8 +109,8 @@ void console_init(void) #if defined(__BOOT_BLOCK__) && CONFIG_BOOTBLOCK_CONSOLE || \ !defined(__BOOT_BLOCK__) && CONFIG_EARLY_CONSOLE -#if CONFIG_DRIVERS_OXFORD_OXPCIE - oxford_init(); +#if CONFIG_EARLY_PCI_BRIDGE + pci_early_bridge_init(); #endif #if CONFIG_CONSOLE_SERIAL uart_init(); |