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authorStefan Reinauer <reinauer@google.com>2011-04-26 23:47:04 +0000
committerStefan Reinauer <stepan@openbios.org>2011-04-26 23:47:04 +0000
commit4885daadb33bea37ef3970696d3cf0d05e9852a3 (patch)
tree9b068b5645f5aa60fd310919c0a08ce3dea34b3f /src/console
parent3187d0267d4b456eb43bca21a817c78687d6f73b (diff)
Add support for memory mapped UARTs to coreboot and add the OXPCIe952 as an
example. This newer version reflects the recent changes to further simplify the console code and partly gets rid of some hacks in the previous version. Signed-off-by: Stefan Reinauer <reinauer@google.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/console')
-rw-r--r--src/console/Kconfig13
-rw-r--r--src/console/Makefile.inc1
-rw-r--r--src/console/console.c5
-rw-r--r--src/console/uart8250mem_console.c60
4 files changed, 75 insertions, 4 deletions
diff --git a/src/console/Kconfig b/src/console/Kconfig
index 972276b675..02244d7ded 100644
--- a/src/console/Kconfig
+++ b/src/console/Kconfig
@@ -2,9 +2,16 @@ menu "Console"
# TODO: Rename to SERIAL_CONSOLE once Kconfig transition is complete.
config CONSOLE_SERIAL8250
bool "Serial port console output"
+ depends on HAVE_UART_IO_MAPPED
default y
help
- Send coreboot debug output to a serial port console.
+ Send coreboot debug output to an I/O mapped serial port console.
+
+config CONSOLE_SERIAL8250MEM
+ bool "Serial port console output (memory mapped)"
+ depends on HAVE_UART_MEMORY_MAPPED
+ help
+ Send coreboot debug output to a memory mapped serial port console.
choice
prompt "Serial port"
@@ -43,7 +50,7 @@ config TTYS0_BASE
choice
prompt "Baud rate"
default CONSOLE_SERIAL_115200
- depends on CONSOLE_SERIAL8250
+ depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM
config CONSOLE_SERIAL_115200
bool "115200"
@@ -82,7 +89,7 @@ config TTYS0_BAUD
config TTYS0_LCS
int
default 3
- depends on CONSOLE_SERIAL8250
+ depends on CONSOLE_SERIAL8250 || CONSOLE_SERIAL8250MEM
# Use "select HAVE_USBDEBUG" on southbridges which have Debug Port code.
config HAVE_USBDEBUG
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index 2b6437898c..4a30918c75 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -14,6 +14,7 @@ romstage-y += post.c
romstage-y += die.c
driver-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c
+driver-$(CONFIG_CONSOLE_SERIAL8250MEM) += uart8250mem_console.c
driver-$(CONFIG_USBDEBUG) += usbdebug_console.c
driver-$(CONFIG_CONSOLE_LOGBUF) += logbuf_console.c
driver-$(CONFIG_CONSOLE_NE2K) += ne2k_console.c
diff --git a/src/console/console.c b/src/console/console.c
index 9ec0e259a9..a73616e948 100644
--- a/src/console/console.c
+++ b/src/console/console.c
@@ -22,7 +22,7 @@
#include <arch/hlt.h>
#include <arch/io.h>
-#if CONFIG_CONSOLE_SERIAL8250
+#if CONFIG_CONSOLE_SERIAL8250 || CONFIG_CONSOLE_SERIAL8250MEM
#include <uart8250.h>
#endif
@@ -106,6 +106,9 @@ void console_init(void)
#if CONFIG_CONSOLE_SERIAL8250
uart_init();
#endif
+#if CONFIG_DRIVERS_OXFORD_OXPCIE && CONFIG_CONSOLE_SERIAL8250MEM
+ oxford_init();
+#endif
#if CONFIG_CONSOLE_NE2K
ne2k_init(CONFIG_CONSOLE_NE2K_IO_PORT);
#endif
diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c
new file mode 100644
index 0000000000..a6968ddc4b
--- /dev/null
+++ b/src/console/uart8250mem_console.c
@@ -0,0 +1,60 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2003 Eric Biederman
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <uart8250.h>
+#include <pc80/mc146818rtc.h>
+
+static u32 uart_bar = 0;
+
+static void uartmem_init(void)
+{
+ uart_bar = uart_mem_init();
+}
+
+static void uartmem_tx_byte(unsigned char data)
+{
+ if (!uart_bar)
+ return;
+
+ uart8250_mem_tx_byte(uart_bar, data);
+}
+
+static unsigned char uartmem_rx_byte(void)
+{
+ if (!uart_bar)
+ return 0;
+
+ return uart8250_mem_rx_byte(uart_bar);
+}
+
+static int uartmem_tst_byte(void)
+{
+ if (!uart_bar)
+ return 0;
+
+ return uart8250_mem_can_rx_byte(uart_bar);
+}
+
+static const struct console_driver uart8250mem_console __console = {
+ .init = uartmem_init,
+ .tx_byte = uartmem_tx_byte,
+ .rx_byte = uartmem_rx_byte,
+ .tst_byte = uartmem_tst_byte,
+};