summaryrefslogtreecommitdiff
path: root/src/console/post.c
diff options
context:
space:
mode:
authorKyösti Mälkki <kyosti.malkki@gmail.com>2019-09-11 09:57:14 +0300
committerPatrick Georgi <pgeorgi@google.com>2019-09-13 09:57:25 +0000
commit216db613a7dfbad3bfb150e3ae9927f5e970cd4c (patch)
treecd39d9ee066463fbdf448bd55de42f5813303309 /src/console/post.c
parentcfcf3c584f3eaf9377a75ada1ac957bb0ceeacfa (diff)
intel/fsp2_0: Move TS_BEFORE_INITRAM
Exclude FSP-M loading from the timestamps used for RAM detection and training process. Change-Id: I859b292f2347c6f0e3e41555ad4fb8d95a139007 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35371 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/console/post.c')
0 files changed, 0 insertions, 0 deletions