diff options
| author | Duncan Laurie <dlaurie@chromium.org> | 2013-06-10 10:34:20 -0700 |
|---|---|---|
| committer | Stefan Reinauer <stefan.reinauer@coreboot.org> | 2013-11-26 19:10:31 +0100 |
| commit | 8adf7a2c50dcb3a7f09b66c1f3918ab195d8c5ec (patch) | |
| tree | 50f9e2599a850991df65570ccf216682f9d7b406 /src/console/post.c | |
| parent | d5686fe23b1341ca2c72b2941cf80577e6198f23 (diff) | |
Log device path into CMOS during probe stages
One of the most common hangs during coreboot execution
is during ramstage device init steps. Currently there
are a set of (somewhat misleading) post codes during this
phase which give some indication as to where execution
stopped, but it provides no information on what device
was actually being initialized at that point.
This uses the new CMOS "extra" log banks to store the
encoded device path of the device that is about to be
touched by coreboot. This way if the system hangs when
talking to the device there will be some indication where
to investigate next.
interrupted boot with reset button and
gathered the eventlog after several test runs:
26 | 2013-06-10 10:32:48 | System boot | 120
27 | 2013-06-10 10:32:48 | Last post code in previous boot | 0x75 | Device Initialize
28 | 2013-06-10 10:32:48 | Extra info from previous boot | PCI | 00:16.0
29 | 2013-06-10 10:32:48 | Reset Button
30 | 2013-06-10 10:32:48 | System Reset
Change-Id: I6045bd4c384358b8a4e464eb03ccad639283939c
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58105
Reviewed-on: http://review.coreboot.org/4230
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
Diffstat (limited to 'src/console/post.c')
| -rw-r--r-- | src/console/post.c | 16 |
1 files changed, 16 insertions, 0 deletions
diff --git a/src/console/post.c b/src/console/post.c index 74886834ce..35cc0e85e1 100644 --- a/src/console/post.c +++ b/src/console/post.c @@ -114,6 +114,22 @@ void post_log_extra(u32 value) spin_unlock(&cmos_post_lock); } + +void post_log_path(struct device *dev) +{ + if (dev) { + /* Encode path into lower 3 bytes */ + u32 path = dev_path_encode(dev); + /* Upper byte contains the log type */ + path |= CMOS_POST_EXTRA_DEV_PATH << 24; + post_log_extra(path); + } +} + +void post_log_clear(void) +{ + post_log_extra(0); +} #endif /* CONFIG_CMOS_POST_EXTRA */ #endif /* !__PRE_RAM__ */ |