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authorCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-06-06 16:50:38 +0000
committerCarl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>2009-06-06 16:50:38 +0000
commitcff071ab0ed60c887ceeaafa2e722b07691fff10 (patch)
treec09d835ab165da775675faa71b099392e059270f /src/config/failovercalculation.lb
parenta7d8ae3b1d91f3f77496b065a7d5158893c4dd28 (diff)
When I started refactoring mainboard Config.lb, I added two different
files for targets without failover: src/config/nofailovercalculation.lb (64 kB XIP) src/config/nofailovercalculation128.lb (128 kB XIP) Targets with other XIP sizes were ignored. This patch moves XIP size back into mainboard code. Benefits from this patch: - src/config/nofailovercalculation128.lb is no longer needed - Targets with XIP sizes besides 64k and 128k benefit from refactoring - Conceptually, this makes the include files pure calculation files without settings. Abuild tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4348 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/config/failovercalculation.lb')
-rw-r--r--src/config/failovercalculation.lb3
1 files changed, 1 insertions, 2 deletions
diff --git a/src/config/failovercalculation.lb b/src/config/failovercalculation.lb
index 909812b7e5..d3047a84bc 100644
--- a/src/config/failovercalculation.lb
+++ b/src/config/failovercalculation.lb
@@ -36,10 +36,9 @@ default _ROMBASE = ( CONFIG_ROM_PAYLOAD_START + PAYLOAD_SIZE )
## Compute a range of ROM that can cached to speed up coreboot,
## execution speed.
##
-## XIP_ROM_SIZE must be a power of 2.
+## XIP_ROM_SIZE must be a power of 2 and is set in mainboard Config.lb
## XIP_ROM_BASE must be a multiple of XIP_ROM_SIZE
##
-default XIP_ROM_SIZE = 64 * 1024
if USE_FAILOVER_IMAGE
default XIP_ROM_BASE = ( _ROMBASE - XIP_ROM_SIZE + ROM_IMAGE_SIZE)