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authorGwendal Grignou <gwendal@chromium.org>2018-06-28 10:09:11 -0700
committerPatrick Georgi <pgeorgi@google.com>2018-07-02 07:25:36 +0000
commitf86c3fc01746712acc0d3c79531eb12c80a2366c (patch)
treeb41862a9aa4bc8644885d7d0f0db39f2720ed694 /src/commonlib/storage
parent6459e427e8d59e7db23b2d7265205cd0b5a7d593 (diff)
nocturne: Do not set 4 LSB of SX9310 CRTL0
These bits start the acquisition process. They should only be set by the driver. BUG=b:74363445 TEST=compile Change-Id: I9e10f5570ac82124f7f4b5cc7aaad27da0c578be Signed-off-by: Gwendal Grignou <gwendal@chromium.org> Reviewed-on: https://review.coreboot.org/27265 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/commonlib/storage')
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