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| author | John Zhao <john.zhao@intel.com> | 2018-10-25 10:45:19 -0700 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2018-10-31 05:38:42 +0000 |
| commit | b3c27f0a242491d96e772cac356e845331c9f45a (patch) | |
| tree | 009855e4df6faa47fc63a223a8aca49020dc84e1 /src/commonlib/mem_pool.c | |
| parent | 2257a35862576b36e89d8f16fb8765913cb06389 (diff) | |
soc/intel/apollolake: Revert the w/a nWR_24 setting
GLK FSP 2.0.6.0 has properly determined MR1 value during InitializeJedec.
Revert the w/a code "odt_config |= nWR_24" in coreboot.
BUG=b:118422998
CQ-DEPEND=CL:*703187
TEST=Verified booting to kernel.
Change-Id: I6dd3c14b2048259a5518e1f72ff1061b9c5c7dfe
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/29276
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/commonlib/mem_pool.c')
0 files changed, 0 insertions, 0 deletions