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| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-03-27 13:50:11 +0100 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-03-28 19:14:47 +0100 |
| commit | ea9f30801822716349772157e12d943b11975521 (patch) | |
| tree | adbe4249e2260612337e7f15f0de5dd4bb25a5a0 /src/arch | |
| parent | 276ff99a079b096f47863ae2cf5a5336601c1522 (diff) | |
build system: normalize linker script file names
We have .lb, .lds, and .ld in the tree. Go for .ld everywhere.
This is inspired by the commit listed below, but rewritten to match
upstream, and split in smaller pieces to keep intent clear.
Change-Id: I3126af608afe4937ec4551a78df5a7824e09b04b
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Based-On-Change-Id: I50af7dacf616e0f8ff4c43f4acc679089ad7022b
Based-On-Signed-off-by: Julius Werner <jwerner@chromium.org>
Based-On-Reviewed-on: https://chromium-review.googlesource.com/219170
Reviewed-on: http://review.coreboot.org/9107
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/riscv/id.ld (renamed from src/arch/riscv/id.lds) | 0 | ||||
| -rw-r--r-- | src/arch/x86/Makefile.inc | 12 | ||||
| -rw-r--r-- | src/arch/x86/init/ldscript_failover.ld (renamed from src/arch/x86/init/ldscript_failover.lb) | 0 | ||||
| -rw-r--r-- | src/arch/x86/lib/id.ld (renamed from src/arch/x86/lib/id.lds) | 0 |
4 files changed, 6 insertions, 6 deletions
diff --git a/src/arch/riscv/id.lds b/src/arch/riscv/id.ld index cfd091dc17..cfd091dc17 100644 --- a/src/arch/riscv/id.lds +++ b/src/arch/riscv/id.ld diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index 5d49abc1bb..175a767e51 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -72,13 +72,13 @@ $(obj)/cmos_layout.bin: $(NVRAMTOOL) $(top)/src/mainboard/$(MAINBOARDDIR)/cmos.l ifeq ($(CONFIG_ARCH_BOOTBLOCK_X86_32),y) -bootblock_lds = $(src)/arch/x86/init/ldscript_failover.lb -bootblock_lds += $(src)/cpu/x86/16bit/entry16.lds -bootblock_lds += $(src)/cpu/x86/16bit/reset16.lds -bootblock_lds += $(src)/arch/x86/lib/id.lds +bootblock_lds = $(src)/arch/x86/init/ldscript_failover.ld +bootblock_lds += $(src)/cpu/x86/16bit/entry16.ld +bootblock_lds += $(src)/cpu/x86/16bit/reset16.ld +bootblock_lds += $(src)/arch/x86/lib/id.ld bootblock_lds += $(chipset_bootblock_lds) ifeq ($(CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE),y) -bootblock_lds += $(src)/cpu/intel/fit/fit.lds +bootblock_lds += $(src)/cpu/intel/fit/fit.ld endif bootblock_inc = $(src)/arch/x86/init/prologue.inc @@ -141,7 +141,7 @@ crt0s = $(src)/arch/x86/init/prologue.inc ldscripts = ldscripts += $(src)/arch/x86/init/romstage.ld crt0s += $(src)/cpu/x86/32bit/entry32.inc -ldscripts += $(src)/cpu/x86/32bit/entry32.lds +ldscripts += $(src)/cpu/x86/32bit/entry32.ld crt0s += $(src)/cpu/x86/fpu_enable.inc ifeq ($(CONFIG_SSE),y) diff --git a/src/arch/x86/init/ldscript_failover.lb b/src/arch/x86/init/ldscript_failover.ld index 318f4299b3..318f4299b3 100644 --- a/src/arch/x86/init/ldscript_failover.lb +++ b/src/arch/x86/init/ldscript_failover.ld diff --git a/src/arch/x86/lib/id.lds b/src/arch/x86/lib/id.ld index cfd091dc17..cfd091dc17 100644 --- a/src/arch/x86/lib/id.lds +++ b/src/arch/x86/lib/id.ld |