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authorArthur Heymans <arthur@aheymans.xyz>2021-05-29 07:30:33 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-06-07 12:54:39 +0000
commitbab9e2e6bdf3bbfa6047773a04632e0fbdf64afb (patch)
treeab42496f77d4bf76f3f9f79eea16ddc92d8a5cd6 /src/arch
parent11cac784ff788b4f0495758d7f5992e457ea552c (diff)
arch/x86: Add a common romstage entry
It might be possible to have this used for more than x86, but that will be for a later commit. Change-Id: I4968364a95b5c69c21d3915d302d23e6f1ca182f Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/55067 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/Makefile.inc1
-rw-r--r--src/arch/x86/romstage.c16
2 files changed, 17 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index eaced1f220..de2dc19c4e 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -159,6 +159,7 @@ endif # CONFIG_ARCH_VERSTAGE_X86_32 / CONFIG_ARCH_VERSTAGE_X86_64
ifeq ($(CONFIG_ARCH_ROMSTAGE_X86_32)$(CONFIG_ARCH_ROMSTAGE_X86_64),y)
romstage-y += assembly_entry.S
+romstage-y += romstage.c
romstage-y += boot.c
romstage-$(CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES) += breakpoint.c
romstage-y += post.c
diff --git a/src/arch/x86/romstage.c b/src/arch/x86/romstage.c
new file mode 100644
index 0000000000..a7ee4d99b4
--- /dev/null
+++ b/src/arch/x86/romstage.c
@@ -0,0 +1,16 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <arch/cpu.h>
+#include <console/console.h>
+#include <timestamp.h>
+#include <romstage_common.h>
+
+asmlinkage void car_stage_entry(void)
+{
+ timestamp_add_now(TS_ROMSTAGE_START);
+
+ /* Assumes the hardware was set up during the bootblock */
+ console_init();
+
+ romstage_main();
+}