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authorRonald G. Minnich <rminnich@gmail.com>2003-06-17 16:51:06 +0000
committerRonald G. Minnich <rminnich@gmail.com>2003-06-17 16:51:06 +0000
commit99acb49cf71ee7038216391ae2b0d09675ab6ce5 (patch)
treee91194f6fba54a0c6816175b919ea594bbe85da1 /src/arch
parent667393676bf0ea08b6aadfc0119bd87f7cf2cc25 (diff)
added config and other test files.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@882 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/i386/Config.lb4
-rw-r--r--src/arch/i386/lib/Config.lb13
-rw-r--r--src/arch/i386/lib/console.inc3
-rw-r--r--src/arch/i386/smp/Config.lb9
4 files changed, 29 insertions, 0 deletions
diff --git a/src/arch/i386/Config.lb b/src/arch/i386/Config.lb
new file mode 100644
index 0000000000..6e0b3359a9
--- /dev/null
+++ b/src/arch/i386/Config.lb
@@ -0,0 +1,4 @@
+default ARCH=i386
+dir lib
+dir boot
+dir smp
diff --git a/src/arch/i386/lib/Config.lb b/src/arch/i386/lib/Config.lb
new file mode 100644
index 0000000000..8d4fe3a3be
--- /dev/null
+++ b/src/arch/i386/lib/Config.lb
@@ -0,0 +1,13 @@
+#object i386_subr.o
+#object params.o
+#object hardwaremain.o
+#object vgabios.o CONFIG_VGABIOS
+#object idt.o CONFIG_REALMODE_IDT
+#object pci-irq.c CONFIG_PCIBIOS_IRQ
+#option CONFIG_LOGICAL_CPUS=1
+#option CONFIG_PCIBIOS_IRQ=0
+object c_start.S
+object cpu.c
+object pci_ops.c
+
+
diff --git a/src/arch/i386/lib/console.inc b/src/arch/i386/lib/console.inc
index 3d6b01b3a2..2f031e5d10 100644
--- a/src/arch/i386/lib/console.inc
+++ b/src/arch/i386/lib/console.inc
@@ -9,6 +9,9 @@ jmp console0
#define LINUXBIOS_EXTRA_VERSION
#endif
+#ifndef ASM_CONSOLE_LOGLEVEL
+#define ASM_CONSOLE_LOGLEVEL 5
+#endif
console_test:
.ascii "\r\n\r\nLinuxBIOS-"
.ascii STR(LINUXBIOS_VERSION)
diff --git a/src/arch/i386/smp/Config.lb b/src/arch/i386/smp/Config.lb
new file mode 100644
index 0000000000..fae7499428
--- /dev/null
+++ b/src/arch/i386/smp/Config.lb
@@ -0,0 +1,9 @@
+if HAVE_MP_TABLE
+ object mpspec.o
+end
+#object ioapic.o CONFIG_IOAPIC
+if CONFIG_SMP
+ object start_stop.o
+# object secondary.S
+end
+