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author | Steven A. Falco <sfalco@coincident.com> | 2011-07-15 21:44:35 -0400 |
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committer | Patrick Georgi <patrick@georgi-clan.de> | 2011-07-17 10:22:23 +0200 |
commit | 4c514aedd831a309b04e0092b85bb2c55d278b9d (patch) | |
tree | 9493c057751a7c3833d0843a8a99f1d00611b1aa /src/arch | |
parent | 43358a5e24da920b7ab8fb285c48f6f6f5955897 (diff) |
port_enable and port_reset must change atomically.
I have observed two separate EHCI host bridges that do not tolerate
using C bit-fields to directly manipulate the portsc_t register. The
reason for this is that the EHCI spec says that port_enable must go
to 0 at the time that port_reset goes to 1. Naturally this cannot be
done using direct bit-field manipulation. Instead, we use a temporary
variable, change the bit-fields there, then atomically write the new
value back to the hardware.
Signed-off-by: Steven A. Falco <sfalco@coincident.com>
Change-Id: If138faee43e0293efa203b86f7893fdf1e811269
Reviewed-on: http://review.coreboot.org/101
Tested-by: build bot (Jenkins)
Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/arch')
0 files changed, 0 insertions, 0 deletions