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authorJens Rottmann <JRottmann@LiPPERTembedded.de>2013-02-18 20:26:50 +0100
committerPeter Stuge <peter@stuge.se>2013-02-18 22:49:59 +0100
commit384ee9f1429db8543724e868b7ffd5fc7e2aa915 (patch)
tree14ee510e9099a9469ca5a4bb56f3fe4e8c81e915 /src/arch
parent9fba303435be16d5eb66ef11ed52ad71cc00c459 (diff)
Persimmon: drop useless DDR3 voltage code copied from Inagua
Inagua can use GPIOs 178,179 to switch VMEM to 1.5, 1.35 or 1.25 V, which it does according to data read from the SO-DIMM's SPD EEPROM. On Persimmon (according to DB-FT1 rev. D schematics) both GPIOs are unconnected, there is no way to change the 1.5 V DDR3 voltage (save unsoldering a resistor). The whole code copied over from Inagua is useless. Removed the code, instead a comment hints at Inagua, for people who do designs based on Persimmon but do have a way to change VMEM. The line ...->DDR3Voltage = VOLT1_5; is supposed to make the AGESA DDR3 code select the RAM timings for the actually supplied voltage instead of the hoped-for but unavailable lower voltage. I have no idea how to test this, but in any case it can't hurt. Change-Id: Id098e09418b665645814a6ee2d41a3bff72238ba Signed-off-by: Jens Rottmann <JRottmann@LiPPERTembedded.de> Reviewed-on: http://review.coreboot.org/2448 Tested-by: build bot (Jenkins) Reviewed-by: Peter Stuge <peter@stuge.se>
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