aboutsummaryrefslogtreecommitdiff
path: root/src/arch
diff options
context:
space:
mode:
authorStefan Reinauer <reinauer@chromium.org>2013-05-24 15:09:36 -0700
committerStefan Reinauer <stefan.reinauer@coreboot.org>2013-07-10 21:43:55 +0200
commite8b08ba47c8b17480bd94eef7dc8a47629191957 (patch)
tree8c2a941cc66a398ade69772b05e873a74b3c50ee /src/arch
parent93ce3b3a28dc0aad0bb501072bc7fc31e9cd6ce2 (diff)
Drop ELF remains from boot code
This stuff is not used, so let's drop it. Change-Id: I671a5e87855b4c59622cafacdefe466ab3d70143 Signed-off-by: Stefan Reinauer <reinauer@chromium.org> Signed-off-by: Gabe Black <gabeblack@chromium.org> Reviewed-on: http://review.coreboot.org/3660 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/armv7/boot.c202
-rw-r--r--src/arch/armv7/include/arch/stages.h1
-rw-r--r--src/arch/armv7/stages.c6
-rw-r--r--src/arch/x86/boot/boot.c84
-rw-r--r--src/arch/x86/include/arch/stages.h1
5 files changed, 28 insertions, 266 deletions
diff --git a/src/arch/armv7/boot.c b/src/arch/armv7/boot.c
index ab531be868..677480230b 100644
--- a/src/arch/armv7/boot.c
+++ b/src/arch/armv7/boot.c
@@ -1,189 +1,27 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2013 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
#include <console/console.h>
-#include <ip_checksum.h>
-#include <boot/elf.h>
-#include <boot/elf_boot.h>
-#include <string.h>
-#include <cpu/x86/multiboot.h>
#include <arch/stages.h>
-
-#ifndef CMD_LINE
-#define CMD_LINE ""
-#endif
-
-
-
-#define UPSZ(X) ((sizeof(X) + 3) &~3)
-
-static struct {
- Elf_Bhdr hdr;
- Elf_Nhdr ft_hdr;
- unsigned char ft_desc[UPSZ(FIRMWARE_TYPE)];
- Elf_Nhdr bl_hdr;
- unsigned char bl_desc[UPSZ(BOOTLOADER)];
- Elf_Nhdr blv_hdr;
- unsigned char blv_desc[UPSZ(BOOTLOADER_VERSION)];
- Elf_Nhdr cmd_hdr;
- unsigned char cmd_desc[UPSZ(CMD_LINE)];
-} elf_boot_notes = {
- .hdr = {
- .b_signature = 0x0E1FB007,
- .b_size = sizeof(elf_boot_notes),
- .b_checksum = 0,
- .b_records = 4,
- },
- .ft_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(FIRMWARE_TYPE),
- .n_type = EBN_FIRMWARE_TYPE,
- },
- .ft_desc = FIRMWARE_TYPE,
- .bl_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(BOOTLOADER),
- .n_type = EBN_BOOTLOADER_NAME,
- },
- .bl_desc = BOOTLOADER,
- .blv_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(BOOTLOADER_VERSION),
- .n_type = EBN_BOOTLOADER_VERSION,
- },
- .blv_desc = BOOTLOADER_VERSION,
- .cmd_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(CMD_LINE),
- .n_type = EBN_COMMAND_LINE,
- },
- .cmd_desc = CMD_LINE,
-};
-
-
-int elf_check_arch(Elf_ehdr *ehdr)
-{
- return (
- ((ehdr->e_machine == EM_386) || (ehdr->e_machine == EM_486)) &&
- (ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
- (ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
- );
-
-}
-
void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
{
- extern unsigned char _ram_seg, _eram_seg;
- unsigned long lb_start, lb_size;
- unsigned long adjust, adjusted_boot_notes;
-
- elf_boot_notes.hdr.b_checksum =
- compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
-
- lb_start = (unsigned long)&_ram_seg;
- lb_size = (unsigned long)(&_eram_seg - &_ram_seg);
- adjust = buffer + size - lb_start;
-
- adjusted_boot_notes = (unsigned long)&elf_boot_notes;
- adjusted_boot_notes += adjust;
-
- printk(BIOS_SPEW, "entry = 0x%08lx\n", (unsigned long)entry);
- printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);
- printk(BIOS_SPEW, "lb_size = 0x%08lx\n", lb_size);
- printk(BIOS_SPEW, "adjust = 0x%08lx\n", adjust);
- printk(BIOS_SPEW, "buffer = 0x%08lx\n", buffer);
- printk(BIOS_SPEW, " elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
- printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
-
+ printk(BIOS_SPEW, "entry = %p\n", entry);
stage_exit(entry);
-#if 0
- /* FIXME: do we need any of this? */
- /* Jump to kernel */
- __asm__ __volatile__(
- " cld \n\t"
- /* Save the callee save registers... */
- " pushl %%esi\n\t"
- " pushl %%edi\n\t"
- " pushl %%ebx\n\t"
- /* Save the parameters I was passed */
- " pushl $0\n\t" /* 20 adjust */
- " pushl %0\n\t" /* 16 lb_start */
- " pushl %1\n\t" /* 12 buffer */
- " pushl %2\n\t" /* 8 lb_size */
- " pushl %3\n\t" /* 4 entry */
- " pushl %4\n\t" /* 0 elf_boot_notes */
- /* Compute the adjustment */
- " xorl %%eax, %%eax\n\t"
- " subl 16(%%esp), %%eax\n\t"
- " addl 12(%%esp), %%eax\n\t"
- " addl 8(%%esp), %%eax\n\t"
- " movl %%eax, 20(%%esp)\n\t"
- /* Place a copy of coreboot in its new location */
- /* Move ``longs'' the coreboot size is 4 byte aligned */
- " movl 12(%%esp), %%edi\n\t"
- " addl 8(%%esp), %%edi\n\t"
- " movl 16(%%esp), %%esi\n\t"
- " movl 8(%%esp), %%ecx\n\n"
- " shrl $2, %%ecx\n\t"
- " rep movsl\n\t"
-
- /* Adjust the stack pointer to point into the new coreboot image */
- " addl 20(%%esp), %%esp\n\t"
- /* Adjust the instruction pointer to point into the new coreboot image */
- " movl $1f, %%eax\n\t"
- " addl 20(%%esp), %%eax\n\t"
- " jmp *%%eax\n\t"
- "1: \n\t"
-
- /* Copy the coreboot bounce buffer over coreboot */
- /* Move ``longs'' the coreboot size is 4 byte aligned */
- " movl 16(%%esp), %%edi\n\t"
- " movl 12(%%esp), %%esi\n\t"
- " movl 8(%%esp), %%ecx\n\t"
- " shrl $2, %%ecx\n\t"
- " rep movsl\n\t"
-
- /* Now jump to the loaded image */
- " movl %5, %%eax\n\t"
- " movl 0(%%esp), %%ebx\n\t"
- " call *4(%%esp)\n\t"
-
- /* The loaded image returned? */
- " cli \n\t"
- " cld \n\t"
-
- /* Copy the saved copy of coreboot where coreboot runs */
- /* Move ``longs'' the coreboot size is 4 byte aligned */
- " movl 16(%%esp), %%edi\n\t"
- " movl 12(%%esp), %%esi\n\t"
- " addl 8(%%esp), %%esi\n\t"
- " movl 8(%%esp), %%ecx\n\t"
- " shrl $2, %%ecx\n\t"
- " rep movsl\n\t"
-
- /* Adjust the stack pointer to point into the old coreboot image */
- " subl 20(%%esp), %%esp\n\t"
-
- /* Adjust the instruction pointer to point into the old coreboot image */
- " movl $1f, %%eax\n\t"
- " subl 20(%%esp), %%eax\n\t"
- " jmp *%%eax\n\t"
- "1: \n\t"
-
- /* Drop the parameters I was passed */
- " addl $24, %%esp\n\t"
-
- /* Restore the callee save registers */
- " popl %%ebx\n\t"
- " popl %%edi\n\t"
- " popl %%esi\n\t"
-
- ::
- "ri" (lb_start), "ri" (buffer), "ri" (lb_size),
- "ri" (entry),
-#if CONFIG_MULTIBOOT
- "ri"(mbi), "ri" (MB_MAGIC2)
-#else
- "ri"(adjusted_boot_notes), "ri" (0x0E1FB007)
-#endif
- );
-#endif
}
diff --git a/src/arch/armv7/include/arch/stages.h b/src/arch/armv7/include/arch/stages.h
index 671c02b3dd..3fd54b9bb4 100644
--- a/src/arch/armv7/include/arch/stages.h
+++ b/src/arch/armv7/include/arch/stages.h
@@ -24,5 +24,6 @@ extern void main(void);
void stage_entry(void) __attribute__((section(".text.stage_entry.armv7")));
void stage_exit(void *);
+void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
#endif
diff --git a/src/arch/armv7/stages.c b/src/arch/armv7/stages.c
index e26dbe5e81..0d2072de50 100644
--- a/src/arch/armv7/stages.c
+++ b/src/arch/armv7/stages.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright (C) 2012 The ChromiumOS Authors. All rights reserved.
+ * Copyright 2012 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -15,7 +15,9 @@
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- *
+ */
+
+/*
* This file contains entry/exit functions for each stage during coreboot
* execution (bootblock entry and ramstage exit will depend on external
* loading.
diff --git a/src/arch/x86/boot/boot.c b/src/arch/x86/boot/boot.c
index 4892c5e009..7fc433db22 100644
--- a/src/arch/x86/boot/boot.c
+++ b/src/arch/x86/boot/boot.c
@@ -1,81 +1,14 @@
#include <console/console.h>
+#include <arch/stages.h>
#include <ip_checksum.h>
-#include <boot/elf.h>
-#include <boot/elf_boot.h>
#include <string.h>
#include <cpu/x86/multiboot.h>
-
-#ifndef CMD_LINE
-#define CMD_LINE ""
-#endif
-
-
-
-#define UPSZ(X) ((sizeof(X) + 3) &~3)
-
-static struct {
- Elf_Bhdr hdr;
- Elf_Nhdr ft_hdr;
- unsigned char ft_desc[UPSZ(FIRMWARE_TYPE)];
- Elf_Nhdr bl_hdr;
- unsigned char bl_desc[UPSZ(BOOTLOADER)];
- Elf_Nhdr blv_hdr;
- unsigned char blv_desc[UPSZ(BOOTLOADER_VERSION)];
- Elf_Nhdr cmd_hdr;
- unsigned char cmd_desc[UPSZ(CMD_LINE)];
-} elf_boot_notes = {
- .hdr = {
- .b_signature = 0x0E1FB007,
- .b_size = sizeof(elf_boot_notes),
- .b_checksum = 0,
- .b_records = 4,
- },
- .ft_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(FIRMWARE_TYPE),
- .n_type = EBN_FIRMWARE_TYPE,
- },
- .ft_desc = FIRMWARE_TYPE,
- .bl_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(BOOTLOADER),
- .n_type = EBN_BOOTLOADER_NAME,
- },
- .bl_desc = BOOTLOADER,
- .blv_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(BOOTLOADER_VERSION),
- .n_type = EBN_BOOTLOADER_VERSION,
- },
- .blv_desc = BOOTLOADER_VERSION,
- .cmd_hdr = {
- .n_namesz = 0,
- .n_descsz = sizeof(CMD_LINE),
- .n_type = EBN_COMMAND_LINE,
- },
- .cmd_desc = CMD_LINE,
-};
-
-
-int elf_check_arch(Elf_ehdr *ehdr)
-{
- return (
- ((ehdr->e_machine == EM_386) || (ehdr->e_machine == EM_486)) &&
- (ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
- (ehdr->e_ident[EI_DATA] == ELFDATA2LSB)
- );
-
-}
-
#if CONFIG_RELOCATABLE_RAMSTAGE
/* When the ramstage is relocatable the elf loading ensures an elf image cannot
* be loaded over the ramstage code. */
void jmp_to_elf_entry(void *entry, unsigned long unused1, unsigned long unused2)
{
- elf_boot_notes.hdr.b_checksum =
- compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
-
/* Jump to kernel */
__asm__ __volatile__(
" cld \n\t"
@@ -90,8 +23,6 @@ void jmp_to_elf_entry(void *entry, unsigned long unused1, unsigned long unused2)
"r" (entry),
#if CONFIG_MULTIBOOT
"b"(mbi), "a" (MB_MAGIC2)
-#else
- "b"(&elf_boot_notes), "a" (0x0E1FB007)
#endif
);
}
@@ -100,25 +31,14 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
{
extern unsigned char _ram_seg, _eram_seg;
unsigned long lb_start, lb_size;
- unsigned long adjust, adjusted_boot_notes;
-
- elf_boot_notes.hdr.b_checksum =
- compute_ip_checksum(&elf_boot_notes, sizeof(elf_boot_notes));
lb_start = (unsigned long)&_ram_seg;
lb_size = (unsigned long)(&_eram_seg - &_ram_seg);
- adjust = buffer + size - lb_start;
-
- adjusted_boot_notes = (unsigned long)&elf_boot_notes;
- adjusted_boot_notes += adjust;
printk(BIOS_SPEW, "entry = 0x%08lx\n", (unsigned long)entry);
printk(BIOS_SPEW, "lb_start = 0x%08lx\n", lb_start);
printk(BIOS_SPEW, "lb_size = 0x%08lx\n", lb_size);
- printk(BIOS_SPEW, "adjust = 0x%08lx\n", adjust);
printk(BIOS_SPEW, "buffer = 0x%08lx\n", buffer);
- printk(BIOS_SPEW, " elf_boot_notes = 0x%08lx\n", (unsigned long)&elf_boot_notes);
- printk(BIOS_SPEW, "adjusted_boot_notes = 0x%08lx\n", adjusted_boot_notes);
/* Jump to kernel */
__asm__ __volatile__(
@@ -206,7 +126,7 @@ void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size)
#if CONFIG_MULTIBOOT
"ri"(mbi), "ri" (MB_MAGIC2)
#else
- "ri"(adjusted_boot_notes), "ri" (0x0E1FB007)
+ "ri"(0), "ri" (0)
#endif
);
}
diff --git a/src/arch/x86/include/arch/stages.h b/src/arch/x86/include/arch/stages.h
index 3dea4278f3..8cbf5da34a 100644
--- a/src/arch/x86/include/arch/stages.h
+++ b/src/arch/x86/include/arch/stages.h
@@ -23,4 +23,5 @@
#include <arch/cpu.h>
void asmlinkage copy_and_run(void);
+void jmp_to_elf_entry(void *entry, unsigned long buffer, unsigned long size);
#endif