diff options
| author | Julius Werner <jwerner@chromium.org> | 2019-10-02 17:28:56 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-12-02 22:12:10 +0000 |
| commit | baf27dbaeb1f6791ebfc416f2175507686bd88ac (patch) | |
| tree | 55c9d8224cde44d732b183624abf76b7446e418e /src/arch | |
| parent | 4a1cbdd51aafa671ecb6c93a475ca9bf6f9ca914 (diff) | |
cbfs: Enable CBFS mcache on most chipsets
This patch flips the default of CONFIG_NO_CBFS_MCACHE so the feature is
enabled by default. Some older chipsets with insufficient SRAM/CAR space
still have it explicitly disabled. All others get the new section added
to their memlayout... 8K seems like a sane default to start with.
Change-Id: I0abd1c813aece6e78fb883f292ce6c9319545c44
Signed-off-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/38424
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/Kconfig | 7 | ||||
| -rw-r--r-- | src/arch/x86/car.ld | 3 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index b5e52e6ecf..95c87dab7a 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -144,6 +144,13 @@ config PRERAM_CBMEM_CONSOLE_SIZE help Increase this value if preram cbmem console is getting truncated +config CBFS_MCACHE_SIZE + hex + depends on !NO_CBFS_MCACHE + default 0x2000 + help + Increase this value if you see CBFS mcache overflow warnings. + config PC80_SYSTEM bool default y if ARCH_X86 diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index c291efb13c..9f8c2ad045 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -48,6 +48,9 @@ TIMESTAMP(., 0x200) +#if !CONFIG(NO_CBFS_MCACHE) + CBFS_MCACHE(., CONFIG_CBFS_MCACHE_SIZE) +#endif #if !CONFIG(NO_FMAP_CACHE) FMAP_CACHE(., FMAP_SIZE) #endif |