diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2020-07-09 07:13:37 +0300 |
|---|---|---|
| committer | Nico Huber <nico.h@gmx.de> | 2020-07-11 14:48:25 +0000 |
| commit | 2446c1e9e99e6448f5f62c7a4f9c50dceec2b25e (patch) | |
| tree | 266234c7563d25e45b566eba394b74b14911c1ea /src/arch | |
| parent | bd5c721f6bd099e2fbad4dbde5e72c0b6945dad9 (diff) | |
arch/x86: Drop CBMEM_TOP_BACKUP
Code has evolved such that there seems to be little
use for global definition of cbmem_top_chipset().
Even for AMD we had three different implementations.
Change-Id: I44805aa49eab526b940e57bd51cd1d9ae0377b4b
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43326
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch')
| -rw-r--r-- | src/arch/x86/Kconfig | 6 | ||||
| -rw-r--r-- | src/arch/x86/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/arch/x86/cbmem.c | 13 |
3 files changed, 0 insertions, 20 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index 968d784d8b..660ff2d4d2 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -133,12 +133,6 @@ config NUM_IPI_STARTS int default 2 -config CBMEM_TOP_BACKUP - def_bool n - help - Platform implements non-volatile storage to cache cbmem_top() - over stage transitions and optionally also over S3 suspend. - config PRERAM_CBMEM_CONSOLE_SIZE hex default 0xc00 diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index fa647b7c9a..61e7edcfb9 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -164,7 +164,6 @@ romstage-y += post.c # gdt_init.S is included by entry32.inc when romstage is the first C # environment. romstage-y += gdt_init.S -romstage-y += cbmem.c romstage-y += cpu_common.c romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += exception.c romstage-$(CONFIG_IDT_IN_EVERY_STAGE) += idt.S diff --git a/src/arch/x86/cbmem.c b/src/arch/x86/cbmem.c deleted file mode 100644 index 353368a1ec..0000000000 --- a/src/arch/x86/cbmem.c +++ /dev/null @@ -1,13 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <cbmem.h> - -#if CONFIG(CBMEM_TOP_BACKUP) - -void *cbmem_top_chipset(void) -{ - /* Top of CBMEM is at highest usable DRAM address below 4GiB. */ - return (void *)restore_top_of_low_cacheable(); -} - -#endif /* CBMEM_TOP_BACKUP */ |