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authorKyösti Mälkki <kyosti.malkki@gmail.com>2018-06-03 07:11:00 +0300
committerPatrick Georgi <pgeorgi@google.com>2018-12-22 11:49:17 +0000
commit74e0390e7487fc531d95cffe7736ab8b5512062a (patch)
treec71dcd5d1663d52b16187062796cec8c5b4debf3 /src/arch
parent513a1a81f778b9fddbb55a36a38b2dd855215327 (diff)
cbmem: Always use EARLY_CBMEM_INIT
Wipe out all remains of EARLY/LATE_CBMEM_INIT. Change-Id: Ice75ec0434bef60fa9493037f48833e38044d6e8 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/26828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/x86/Kconfig12
1 files changed, 0 insertions, 12 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index 7c8371eff1..794ea115de 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -129,18 +129,6 @@ config CBMEM_TOP_BACKUP
Platform implements non-volatile storage to cache cbmem_top()
over stage transitions and optionally also over S3 suspend.
-config LATE_CBMEM_INIT
- def_bool n
- select CBMEM_TOP_BACKUP
- help
- Enable this in chipset's Kconfig if northbridge does not implement
- early cbmem_top() call for romstage. CBMEM tables will be allocated
- late in ramstage, after PCI devices resources are known.
-
- WARNING: Late CBMEM initialization is deprecated. Platforms that
- don't support early CBMEM initialization will be removed after
- the release of coreboot 4.7.
-
config PRERAM_CBMEM_CONSOLE_SIZE
hex
default 0xc00