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authorJulius Werner <jwerner@chromium.org>2018-08-10 16:13:26 -0700
committerJulius Werner <jwerner@chromium.org>2018-08-17 21:29:46 +0000
commit5d6593a43c728a9d526a3cb0026048bf335830d4 (patch)
tree973e093b9daf4edd1c6b6a13b70ba97cce6483d3 /src/arch
parent2d22cda32c5b9f21ab0c7271bc88a2472fc0fda2 (diff)
arm64: Factor out common parts of romstage execution flow
The romstage main() entry point on arm64 boards is usually in mainboard code, but there are a handful of lines that are always needed in there and not really mainboard specific (or chipset specific). We keep arguing every once in a while that this isn't ideal, so rather than arguing any longer let's just fix it. This patch moves the main() function into arch code with callbacks that the platform can hook into. (This approach can probably be expanded onto other architectures, so when that happens this file should move into src/lib.) Tested on Cheza and Kevin. I think the approach is straight-forward enough that we can take this without testing every board. (Note that in a few cases, this delays some platform-specific calls until after console_init() and exception_init()... since these functions don't really take that long, especially if there is no serial console configured, I don't expect this to cause any issues.) Change-Id: I7503acafebabed00dfeedb00b1354a26c536f0fe Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/28199 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/arm64/Makefile.inc1
-rw-r--r--src/arch/arm64/include/arch/stages.h7
-rw-r--r--src/arch/arm64/romstage.c39
3 files changed, 47 insertions, 0 deletions
diff --git a/src/arch/arm64/Makefile.inc b/src/arch/arm64/Makefile.inc
index e2c44eb479..6bb7196805 100644
--- a/src/arch/arm64/Makefile.inc
+++ b/src/arch/arm64/Makefile.inc
@@ -107,6 +107,7 @@ romstage-$(CONFIG_ARM64_USE_ARCH_TIMER) += arch_timer.c
romstage-y += memset.S
romstage-y += memcpy.S
romstage-y += memmove.S
+romstage-y += romstage.c
romstage-y += transition.c transition_asm.S
rmodules_arm64-y += memset.S
diff --git a/src/arch/arm64/include/arch/stages.h b/src/arch/arm64/include/arch/stages.h
index 9a88ea7fbe..2d6d583fce 100644
--- a/src/arch/arm64/include/arch/stages.h
+++ b/src/arch/arm64/include/arch/stages.h
@@ -21,4 +21,11 @@
void stage_entry(void);
+/* This function is the romstage platform entry point, and should contain all
+ chipset and mainboard setup until DRAM is initialized and accessible. */
+void platform_romstage_main(void);
+/* This is an optional hook to run further chipset or mainboard code after DRAM
+ and associated support frameworks (like CBMEM) have been initialized. */
+void platform_romstage_postram(void);
+
#endif
diff --git a/src/arch/arm64/romstage.c b/src/arch/arm64/romstage.c
new file mode 100644
index 0000000000..8cdb16baef
--- /dev/null
+++ b/src/arch/arm64/romstage.c
@@ -0,0 +1,39 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <arch/exception.h>
+#include <arch/stages.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <program_loading.h>
+#include <timestamp.h>
+
+__weak void platform_romstage_main(void) { /* no-op, for bring-up */ }
+__weak void platform_romstage_postram(void) { /* no-op */ }
+
+void main(void)
+{
+ timestamp_add_now(TS_START_ROMSTAGE);
+
+ console_init();
+ exception_init();
+
+ platform_romstage_main();
+ cbmem_initialize_empty();
+ platform_romstage_postram();
+
+ run_ramstage();
+}