buildsystem: Promote rules.h to default include

Does not fix 3rdparty/, *.S or *.ld or yet.

Change-Id: I66b48013dd89540b35ab219d2b64bc13f5f19cda
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/17656
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>

12 files changed, 0 insertions, 12 deletions

diff --git a/src/arch/arm64/boot.c b/src/arch/arm64/boot.c
index 54a33e0daf..c2119f3890 100644
--- a/src/arch/arm64/boot.c
+++ b/src/arch/arm64/boot.c
@@ -19,7 +19,6 @@
 #include <arch/transition.h>
 #include <arm_tf.h>
 #include <program_loading.h>
-#include <rules.h>
 #include <string.h>
 
 static void run_payload(struct prog *prog)
diff --git a/src/arch/riscv/boot.c b/src/arch/riscv/boot.c
index 04fba07234..3d8d5d623e 100644
--- a/src/arch/riscv/boot.c
+++ b/src/arch/riscv/boot.c
@@ -17,7 +17,6 @@
 #include <vm.h>
 #include <arch/boot.h>
 #include <arch/encoding.h>
-#include <rules.h>
 #include <console/console.h>
 #include <arch/smp/smp.h>
 
diff --git a/src/arch/riscv/stages.c b/src/arch/riscv/stages.c
index 4fe040934e..5e7fa4f75b 100644
--- a/src/arch/riscv/stages.c
+++ b/src/arch/riscv/stages.c
@@ -28,7 +28,6 @@
 #include <arch/encoding.h>
 #include <arch/stages.h>
 #include <arch/smp/smp.h>
-#include <rules.h>
 
 void stage_entry(void)
 {
diff --git a/src/arch/x86/acpi_s3.c b/src/arch/x86/acpi_s3.c
index ad9fe0066b..b5a94982a6 100644
--- a/src/arch/x86/acpi_s3.c
+++ b/src/arch/x86/acpi_s3.c
@@ -22,7 +22,6 @@
 #include <timestamp.h>
 #include <program_loading.h>
 #include <romstage_handoff.h>
-#include <rules.h>
 #include <symbols.h>
 
 #if ENV_RAMSTAGE || ENV_POSTCAR
diff --git a/src/arch/x86/exception.c b/src/arch/x86/exception.c
index 0f42fdf79f..700eb84cd0 100644
--- a/src/arch/x86/exception.c
+++ b/src/arch/x86/exception.c
@@ -19,7 +19,6 @@
 #include <console/streams.h>
 #include <cpu/x86/cr.h>
 #include <cpu/x86/lapic.h>
-#include <rules.h>
 #include <stdint.h>
 #include <string.h>
 
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index cd86e83120..a061a271e8 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -57,7 +57,6 @@
 
 #if !defined(__ASSEMBLER__) && !defined(__ACPI__) && !defined(__ROMCC__)
 #include <stdint.h>
-#include <rules.h>
 #include <commonlib/helpers.h>
 #include <device/device.h>
 #include <uuid.h>
diff --git a/src/arch/x86/include/arch/cpu.h b/src/arch/x86/include/arch/cpu.h
index b50fef2b56..3ee5cea761 100644
--- a/src/arch/x86/include/arch/cpu.h
+++ b/src/arch/x86/include/arch/cpu.h
@@ -16,7 +16,6 @@
 
 #include <stdint.h>
 #include <stddef.h>
-#include <rules.h>
 
 /*
  * EFLAGS bits
diff --git a/src/arch/x86/include/arch/early_variables.h b/src/arch/x86/include/arch/early_variables.h
index 2cf76ad94a..2b74544d5c 100644
--- a/src/arch/x86/include/arch/early_variables.h
+++ b/src/arch/x86/include/arch/early_variables.h
@@ -18,7 +18,6 @@
 
 #include <arch/symbols.h>
 #include <stdlib.h>
-#include <rules.h>
 
 #if ENV_CACHE_AS_RAM && !IS_ENABLED(CONFIG_NO_CAR_GLOBAL_MIGRATION)
 asm(".section .car.global_data,\"w\",@nobits");
diff --git a/src/arch/x86/include/arch/exception.h b/src/arch/x86/include/arch/exception.h
index 8f7213d27e..08aedef797 100644
--- a/src/arch/x86/include/arch/exception.h
+++ b/src/arch/x86/include/arch/exception.h
@@ -31,7 +31,6 @@
 #define _ARCH_EXCEPTION_H
 
 #include <arch/cpu.h>
-#include <rules.h>
 
 #if IS_ENABLED(CONFIG_IDT_IN_EVERY_STAGE) || ENV_RAMSTAGE
 asmlinkage void exception_init(void);
diff --git a/src/arch/x86/include/arch/io.h b/src/arch/x86/include/arch/io.h
index e4e3067a75..4050a4798a 100644
--- a/src/arch/x86/include/arch/io.h
+++ b/src/arch/x86/include/arch/io.h
@@ -16,7 +16,6 @@
 
 #include <endian.h>
 #include <stdint.h>
-#include <rules.h>
 #include <device/pci_type.h>
 
 /*
diff --git a/src/arch/x86/include/arch/memlayout.h b/src/arch/x86/include/arch/memlayout.h
index 83e5b90c2a..f93dece086 100644
--- a/src/arch/x86/include/arch/memlayout.h
+++ b/src/arch/x86/include/arch/memlayout.h
@@ -16,7 +16,6 @@
 #ifndef __ARCH_MEMLAYOUT_H
 #define __ARCH_MEMLAYOUT_H
 
-#include <rules.h>
 
 #if ENV_BOOTBLOCK || ENV_ROMSTAGE || ENV_VERSTAGE
 /* No .data or .bss sections. Cache as RAM is handled separately. */
diff --git a/src/arch/x86/rdrand.c b/src/arch/x86/rdrand.c
index 97aabd4ab5..35aac710a8 100644
--- a/src/arch/x86/rdrand.c
+++ b/src/arch/x86/rdrand.c
@@ -14,7 +14,6 @@
  */
 
 #include <random.h>
-#include <rules.h>
 
 /*
  * Intel recommends that applications attempt 10 retries in a tight loop