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authorStefan Reinauer <reinauer@chromium.org>2013-07-16 11:03:27 -0700
committerPatrick Georgi <patrick@georgi-clan.de>2013-12-21 13:00:21 +0100
commit10bd772db854c62528c67b9d0e5e329c525d83f9 (patch)
treeb6819f825de507d49c9aa4d2b9c228337e00ff55 /src/arch
parentc59fda321697974d467dc7ae8f7b22b43a1899af (diff)
Enable CAR migration on Exynos 5250 and 5420
Despite calling romstage memory CAR in this case, the variables actually do live in SRAM on the Exynos CPUs. However, in order to share as much generic code as possible, we're using the same infrastructure here. Change-Id: I85173c37099a25f3e55980e88120401826cdf29c Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/62188 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/4394 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
Diffstat (limited to 'src/arch')
-rw-r--r--src/arch/armv7/romstage.ld20
1 files changed, 19 insertions, 1 deletions
diff --git a/src/arch/armv7/romstage.ld b/src/arch/armv7/romstage.ld
index 0555fc45ff..146ba77b36 100644
--- a/src/arch/armv7/romstage.ld
+++ b/src/arch/armv7/romstage.ld
@@ -52,10 +52,28 @@ SECTIONS
*(.rodata);
*(.machine_param);
*(.data);
- . = ALIGN(8);
+ . = ALIGN(16);
+ _car_migrate_start = .;
+ *(.car.migrate);
+ _car_migrate_end = .;
+ . = ALIGN(16);
_erom = .;
}
+ .car.data . (NOLOAD) : {
+ _car_data_start = .;
+ *(.car.global_data);
+ /* The cbmem_console section comes last to take advantage of
+ * a zero-sized array to hold the memconsole contents that
+ * grows to a bound of CONFIG_CONSOLE_CAR_BUFFER_SIZE. However,
+ * collisions within the cache-as-ram region cannot be
+ * statically checked because the cache-as-ram region usage is
+ * cpu/chipset dependent. */
+ *(.car.cbmem_console);
+ _car_data_end = .;
+ }
+
+
__image_copy_end = .;
/* bss does not contain data, it is just a space that should be zero