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authorLee Leahy <leroy.p.leahy@intel.com>2016-06-08 12:47:07 -0700
committerLeroy P Leahy <leroy.p.leahy@intel.com>2016-06-09 22:45:51 +0200
commit6735871531301f56384376c54d88bbc75b660e74 (patch)
tree46542a12ce940f5939d4f9baab179cd6caab1c3b /src/arch/x86
parentde4b09fa26f37396ceaaa27d6ca8a038364f1e52 (diff)
mainboard: Support ROM_SIZE > 16 MiB
Support ROM_SIZE greater than 16 MiB. Work around SMBIOS rom size limitation of 16 MiB by specifying 16 MiB as the ROM size. TEST=Build and run on neoncity Change-Id: I3f464599cd8a1b6482db8b9deab03126c8b92128 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: https://review.coreboot.org/15108 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/smbios.c8
1 files changed, 7 insertions, 1 deletions
diff --git a/src/arch/x86/smbios.c b/src/arch/x86/smbios.c
index 7b6dda18fa..5784beb088 100644
--- a/src/arch/x86/smbios.c
+++ b/src/arch/x86/smbios.c
@@ -292,7 +292,13 @@ static int smbios_write_type0(unsigned long *current, int handle)
#endif
#endif /* CONFIG_CHROMEOS */
- t->bios_rom_size = (CONFIG_ROM_SIZE / 65535) - 1;
+ /* As a work around to prevent a compiler error, temporarily specify
+ * 16 MiB flash sizes when ROM size >= 16 MiB. An update is necessary
+ * once the SMBIOS specification addresses ROM sizes > 16 MiB.
+ */
+ uint32_t rom_size = CONFIG_ROM_SIZE;
+ rom_size = MIN(CONFIG_ROM_SIZE, 16 * MiB);
+ t->bios_rom_size = (rom_size / 65535) - 1;
t->system_bios_major_release = 4;
t->bios_characteristics =