soc/intel/cmn/graphics: Use pci_dev_request_bus_master for BM enabling

Enabling Bus Master isn't required by the hardware, so we shouldn't
need to enable it at all. However, some payloads do not set this bit
before attempting DMA transfers, which results in functionality
failure. For example: in this case, unable to see the developer screen
in Depthcharge.

In the prior IA SoC platform, FSP/GFX PEIM does the BM enabling for
the IGD BAR resources but starting with the MTL platform, it fails
to do so resulting into inability to see the Pre-OS display.

BUG=b:243919230 ([Rex] Unable to see Pre-OS display although GFX
                 PEIM Display Init is successful during AP boot)
TEST=Able to see the developer screen with eDP/HDMI while booting
the Google/Rex.

Also, this change doesn't impact the previous platforms
(ADL, TGL, CML etc.) where the BM is default enabled.

Signed-off-by: Subrata Banik <subratabanik@google.com>
Change-Id: I9ad9eee8379b7ea1e50224e3fabb347e5f14c25b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/67273
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Tarun Tuli <taruntuli@google.com>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Jamie Ryu <jamie.m.ryu@intel.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>

0 files changed, 0 insertions, 0 deletions