diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2017-02-12 23:34:39 +0100 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2017-09-06 04:41:04 +0000 |
| commit | 250272340bcc2132d6af42c4f2761526890f6bf4 (patch) | |
| tree | 06b713fde5bca32ecca37d6ebdf21423cb2e655a /src/arch/x86 | |
| parent | 3397aa1fd469335e99befec2fbf93d505f58d70c (diff) | |
nb/intel/i945/raminit.c: Refactor tRD selection
Inspired by gm45 code, which sets this value the same way.
Some values for tRD on 800 and 1067MHz FSB were set wrong because the
CAS/Freq selection was wrong. CAS was often selected to low and when
fixing CAS this results in tRD being too high, due to an incorrect
lookup table which caused instability.
PASSED memtest86+ during 10h+ on 1067MHZ fsb with 667MHz ddr2, CAS 5
on GA-945GCM-S2L.
Change-Id: I8002daf25b7603131b78b01075f43fd23747dd94
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/18354
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/arch/x86')
0 files changed, 0 insertions, 0 deletions