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authorKyösti Mälkki <kyosti.malkki@gmail.com>2012-03-19 19:12:49 +0200
committerRudolf Marek <r.marek@assembler.cz>2012-03-25 20:23:21 +0200
commit2172f61ede0ff7764eae39d4b75085c2dee9b610 (patch)
treed000e2e7c411402a15348a5052d3396ec35666b6 /src/arch/x86
parentc0ea5436c4d78d15a42d81fc65ed0219e5464f2b (diff)
Makefile: rename linker intermediate variable
Renamed CONFIG_ROMBASE to ROMSTAGE_BASE and removed it from Kconfig. Removed no-op calculation in ldscript. Change-Id: I53d39b60f07db76c8537b3133e59360687b9d4a7 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/802 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/Kconfig4
-rwxr-xr-xsrc/arch/x86/Makefile.inc4
-rw-r--r--src/arch/x86/init/bootblock.ld7
3 files changed, 3 insertions, 12 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig
index c5a0c0e2f5..314646fdb9 100644
--- a/src/arch/x86/Kconfig
+++ b/src/arch/x86/Kconfig
@@ -8,10 +8,6 @@ config AP_IN_SIPI_WAIT
default n
depends on ARCH_X86
-config ROMBASE
- hex
- default 0xffff0000
-
config RAMBASE
hex
default 0x100000
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index d3dac118ec..fc3cd14fba 100755
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -342,10 +342,10 @@ $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootbl
# Build the romstage
$(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $$(romstage-objs) $(obj)/romstage/ldscript.ld
@printf " LINK $(subst $(obj)/,,$(@))\n"
- printf "CONFIG_ROMBASE = 0x0;\n" > $(obj)/location.ld
+ printf "ROMSTAGE_BASE = 0x0;\n" > $(obj)/location.ld
$(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(romstage-objs)
$(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin
- printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld
+ printf "ROMSTAGE_BASE = 0x" > $(obj)/location.ld
$(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt || { echo "The romstage is larger than XIP size. Please expand the CONFIG_XIP_ROM_SIZE" ; exit 1; }
cat $(obj)/location.txt >> $(obj)/location.ld
printf ';\n' >> $(obj)/location.ld
diff --git a/src/arch/x86/init/bootblock.ld b/src/arch/x86/init/bootblock.ld
index fd4d3db960..27d718fcbc 100644
--- a/src/arch/x86/init/bootblock.ld
+++ b/src/arch/x86/init/bootblock.ld
@@ -25,13 +25,8 @@ OUTPUT_ARCH(i386)
TARGET(binary)
SECTIONS
{
- . = CONFIG_ROMBASE;
+ . = ROMSTAGE_BASE;
- /* cut _start into last 64k */
- _x = .;
- . = (_x < CONFIG_ROMBASE) ? (CONFIG_ROMBASE) : _x;
-
- /* This section might be better named .setup */
.rom . : {
_rom = .;
*(.rom.text);