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authorPatrick Rudolph <patrick.rudolph@9elements.com>2018-04-18 10:31:19 +0200
committerPatrick Rudolph <siro@das-labor.org>2018-05-02 06:54:22 +0000
commitf5180a957a020f8387a67f6c1c6045424df648f4 (patch)
treebd104a216ecb46ac8adcda619523f32ad4b5cccc /src/arch/x86
parent8cfd76d44eef62a821c355dc70a4e345e50b4f05 (diff)
pci: Fix MMCONF_SUPPORT on non x86
Move x86 specific pci_bus_default_ops into arch/x86 folder. Fixes compilation on platforms that do neither have MMCONF_SUPPORT nor NO_MMCONF_SUPPORT (for example: all non-x86) but select PCI. Change-Id: I0991ab00c9a56b23cd012dd2b8b861f9737a9e9c Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/25724 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/Makefile.inc1
-rw-r--r--src/arch/x86/include/arch/pci_ops.h2
-rw-r--r--src/arch/x86/pci_ops.c25
3 files changed, 26 insertions, 2 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index 07bef93453..0f4de166cb 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -341,6 +341,7 @@ ramstage-y += memset.c
ramstage-$(CONFIG_X86_TOP4G_BOOTMEDIA_MAP) += mmap_boot.c
ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
ramstage-y += pci_ops_conf1.c
+ramstage-y += pci_ops.c
ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c
ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
ramstage-y += rdrand.c
diff --git a/src/arch/x86/include/arch/pci_ops.h b/src/arch/x86/include/arch/pci_ops.h
index 1b245aa784..678edbb63c 100644
--- a/src/arch/x86/include/arch/pci_ops.h
+++ b/src/arch/x86/include/arch/pci_ops.h
@@ -19,8 +19,6 @@
extern const struct pci_bus_operations pci_cf8_conf1;
extern const struct pci_bus_operations pci_ops_mmconf;
-const struct pci_bus_operations *pci_bus_default_ops(device_t dev);
-
#endif
#endif /* ARCH_I386_PCI_OPS_H */
diff --git a/src/arch/x86/pci_ops.c b/src/arch/x86/pci_ops.c
new file mode 100644
index 0000000000..4fd916c865
--- /dev/null
+++ b/src/arch/x86/pci_ops.c
@@ -0,0 +1,25 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 Facebook, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <device/device.h>
+#include <device/pci_ops.h>
+
+const struct pci_bus_operations *pci_bus_default_ops(struct device *dev)
+{
+ if (IS_ENABLED(CONFIG_NO_MMCONF_SUPPORT))
+ return &pci_cf8_conf1;
+
+ return &pci_ops_mmconf;
+}