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authorXiang Wang <wxjstz@126.com>2018-09-11 15:53:36 +0800
committerPatrick Georgi <pgeorgi@google.com>2018-10-11 10:56:54 +0000
commit4356e09235b911ad0c66f7467e25f6a88e823009 (patch)
treea430040c577e63efdf37bbe07e7da32fe2414728 /src/arch/x86
parenta08475e9abe48393453560a7bdd9ffc040be7845 (diff)
riscv: add physical memory protection (PMP) support
These codes are written by me based on the privileged instruction set. I tested it by qemu/riscv-probe. Change-Id: I2e9e0c94e6518f63ade7680a3ce68bacfae219d4 Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/28569 Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86')
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