summaryrefslogtreecommitdiff
path: root/src/arch/x86
diff options
context:
space:
mode:
authorReka Norman <rekanorman@google.com>2022-05-12 14:48:17 +1000
committerFelix Held <felix-coreboot@felixheld.de>2022-05-19 11:06:38 +0000
commite46a9775418501ef77a646adf312975a936f0e51 (patch)
treefe975434663e020cbfbc880594ecfeec2174b194 /src/arch/x86
parenteb0c90aec52b1c62cd0e121940aee2375fc3f557 (diff)
mb/google/nissa: Rework LTE GPIO configuration
Currently, the LTE pins are enabled in gpio.c, then disabled in fw_config.c if LTE is not present. However, since there's a short delay between mainboard_init() and fw_config_handle(), this means that when LTE is not present GPP_H19 (SOC_I2C_SUB_INT_ODL, used for the SAR sensor) will be floating for a short period of time. Rework the GPIO config so that the LTE pins are disabled in the baseboard, then enabled in fw_config.c for variants using LTE. However, this doesn't work for WWAN_EN and WWAN_RST_L since they need to be enabled in bootblock. So these are instead enabled in the variant gpio.c, then disabled in fw_config.c if LTE is not present. BUG=None TEST=LTE still works on nivviks Change-Id: I9d8cbdff5a0dc9bdee87ee0971bc170409d925a2 Signed-off-by: Reka Norman <rekanorman@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/64270 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nick Vaccaro <nvaccaro@google.com> Reviewed-by: Kangheui Won <khwon@chromium.org>
Diffstat (limited to 'src/arch/x86')
0 files changed, 0 insertions, 0 deletions