summaryrefslogtreecommitdiff
path: root/src/arch/x86
diff options
context:
space:
mode:
authorFelix Singer <felixsinger@posteo.net>2022-07-29 01:46:06 +0200
committerFelix Singer <felixsinger@posteo.net>2022-07-29 23:58:51 +0000
commit50002b7fac5f3ef7c2124893d55a49405ff2e02f (patch)
tree75ba713bc8dc0b0da8dfc1f280c72c8711e2a7bf /src/arch/x86
parent8072b420a6617a461f9708540b9cbdd295d5b30c (diff)
arch/x86/acpi: Replace Add(a,b,c) with ASL 2.0 syntax
Replace `Add (a, b, c)` with `c = a + b`. Change-Id: If848d391e5ec33ebfb08515414739dbdd5011e08 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/66249 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sean Rhodes <sean@starlabs.systems> Reviewed-by: Sridhar Siricilla <sridhar.siricilla@intel.com>
Diffstat (limited to 'src/arch/x86')
-rw-r--r--src/arch/x86/acpi/debug.asl4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/arch/x86/acpi/debug.asl b/src/arch/x86/acpi/debug.asl
index 3f04b03c37..41d123520e 100644
--- a/src/arch/x86/acpi/debug.asl
+++ b/src/arch/x86/acpi/debug.asl
@@ -77,9 +77,9 @@ Method(DBGN, 1)
{
and(Arg0, 0x0f, Local0)
if (LLess(Local0, 10)) {
- add(Local0, 0x30, Local0)
+ Local0 += 0x30
} else {
- add(Local0, 0x37, Local0)
+ Local0 += 0x37
}
OUTC(Local0)
}