diff options
| author | Jeremy Compostella <jeremy.compostella@intel.com> | 2023-08-18 14:25:22 -0700 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-10-20 14:32:44 +0000 |
| commit | 052fb7c45136263ed194c24fd4d04488a2608fd3 (patch) | |
| tree | 951b5614c6d21459394a4b6a22d741daa711d6c3 /src/arch/x86 | |
| parent | 621ccf8a975de10a641ba36c9f8065b7fb659611 (diff) | |
x86: Add pre-memory stages CBFS cache scratchpad support
Having a CBFS cache scratchpad offers a generic way to decompress CBFS
files through the cbfs_map() function without having to reserve a
per-file specific memory region.
This commit introduces the x86 `PRERAM_CBFS_CACHE_SIZE' Kconfig to set
the pre-memory stages CBFS cache size. A cache size of zero disables
the CBFS cache feature. The default value is 16 KB which seems a
reasonable minimal value enough to satisfy basic needs such as the
decompression of a small configuration file. This setting can be
adjusted depending on the platform needs and capabilities.
We have set this size to zero for all the platforms without enough
space in Cache-As-RAM to accommodate the default size.
TEST=Decompression of vbt.bin in romstage on rex using cbfs_map()
Change-Id: Iee493f9947fddcc57576f04c3d6a2d58c7368e09
Signed-off-by: Jeremy Compostella <jeremy.compostella@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77290
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/arch/x86')
| -rw-r--r-- | src/arch/x86/Kconfig | 7 | ||||
| -rw-r--r-- | src/arch/x86/car.ld | 3 |
2 files changed, 10 insertions, 0 deletions
diff --git a/src/arch/x86/Kconfig b/src/arch/x86/Kconfig index c97fecb3e4..b0e479b1c4 100644 --- a/src/arch/x86/Kconfig +++ b/src/arch/x86/Kconfig @@ -153,6 +153,13 @@ config CBFS_MCACHE_SIZE Increase this value if you see CBFS mcache overflow warnings. Do NOT change this value for vboot RW updates! +config PRERAM_CBFS_CACHE_SIZE + hex + default 0x4000 + help + Define the size of the Pre-RAM stages CBFS cache. A size of + zero disables the CBFS cache feature in pre-memory stages. + config PC80_SYSTEM bool default y if ARCH_X86 diff --git a/src/arch/x86/car.ld b/src/arch/x86/car.ld index 14fdba6331..2ad1ca2cd8 100644 --- a/src/arch/x86/car.ld +++ b/src/arch/x86/car.ld @@ -51,6 +51,9 @@ FMAP_CACHE(., FMAP_SIZE) #endif + . = ALIGN(CONFIG_CBFS_CACHE_ALIGN); + CBFS_CACHE(., CONFIG_PRERAM_CBFS_CACHE_SIZE) + /* Reserve sizeof(struct ehci_dbg_info). */ REGION(car_ehci_dbg_info, ., 80, 1) |