diff options
author | Robbie Zhang <robbie.zhang@intel.com> | 2017-02-13 13:44:14 -0800 |
---|---|---|
committer | Martin Roth <martinroth@google.com> | 2017-02-20 04:46:10 +0100 |
commit | 18792314d7b8dde596a9c378b2d47516cbd871f4 (patch) | |
tree | 6fd011d1f959d84f1253268db2d192cf55190f65 /src/arch/x86 | |
parent | f296ce91b90ba845b1ff5ca35e98e52e884694cf (diff) |
arch/x86: add functions to generate random numbers
Using x86 RDRAND instruction, two functions are supplied to
generate a 32bit or 64bit number.
One potential usage is the sealing key generation for SGX.
BUG=chrome-os-partner:62438
BRANCH=NONE
TEST=Tested on Eve to generate a 64bit random number.
Change-Id: I50cbeda4de17ccf2fc5efc1fe04f6b1a31ec268c
Signed-off-by: Robbie Zhang <robbie.zhang@intel.com>
Reviewed-on: https://review.coreboot.org/18362
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86')
-rw-r--r-- | src/arch/x86/Makefile.inc | 1 | ||||
-rw-r--r-- | src/arch/x86/rdrand.c | 83 |
2 files changed, 84 insertions, 0 deletions
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc index c4bb1cccef..332e8ec6f6 100644 --- a/src/arch/x86/Makefile.inc +++ b/src/arch/x86/Makefile.inc @@ -334,6 +334,7 @@ ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c ramstage-y += pci_ops_conf1.c ramstage-$(CONFIG_MMCONF_SUPPORT) += pci_ops_mmconf.c ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c +ramstage-y += rdrand.c ramstage-$(CONFIG_GENERATE_SMBIOS_TABLES) += smbios.c ramstage-y += tables.c ramstage-$(CONFIG_COOP_MULTITASKING) += thread.c diff --git a/src/arch/x86/rdrand.c b/src/arch/x86/rdrand.c new file mode 100644 index 0000000000..dc7ed60a61 --- /dev/null +++ b/src/arch/x86/rdrand.c @@ -0,0 +1,83 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2017 Intel Corporation. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include <random.h> +#include <rules.h> + +/* + * Intel recommends that applications attempt 10 retries in a tight loop + * in the unlikely event that the RDRAND instruction does not successfully + * return a random number. The odds of ten failures in a row would in fact + * be an indication of a larger CPU issue. + */ +#define RDRAND_RETRY_LOOPS 10 + +/* + * Generate a 32-bit random number through RDRAND instruction. + * Carry flag is set on RDRAND success and 0 on failure. + */ +static inline uint8_t rdrand_32(uint32_t *rand) +{ + uint8_t carry; + + __asm__ __volatile__( + ".byte 0x0f; .byte 0xc7; .byte 0xf0; setc %1" + : "=a" (*rand), "=qm" (carry)); + return carry; +} + +/* + * Generate a 64-bit random number through RDRAND instruction. + * Carry flag is set on RDRAND success and 0 on failure. + */ +static inline uint8_t rdrand_64(uint64_t *rand) +{ + uint8_t carry; + + __asm__ __volatile__( + ".byte 0x48; .byte 0x0f; .byte 0xc7; .byte 0xf0; setc %1" + : "=a" (*rand), "=qm" (carry)); + return carry; +} + +int get_random_number_32(uint32_t *rand) +{ + int i; + + /* Perform a loop call until RDRAND succeeds or returns failure. */ + for (i = 0; i < RDRAND_RETRY_LOOPS; i++) { + if (rdrand_32(rand)) + return 0; + } + return -1; +} + +int get_random_number_64(uint64_t *rand) +{ + int i; + uint32_t rand_high, rand_low; + + /* Perform a loop call until RDRAND succeeds or returns failure. */ + for (i = 0; i < RDRAND_RETRY_LOOPS; i++) { + if (ENV_X86_64 && rdrand_64(rand)) + return 0; + else if (rdrand_32(&rand_high) && rdrand_32(&rand_low)) { + *rand = ((uint64_t)rand_high << 32) | + (uint64_t)rand_low; + return 0; + } + } + return -1; +} |