diff options
| author | Zhao, Lijian <lijian.zhao@intel.com> | 2016-01-20 13:02:38 -0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2016-04-11 18:23:08 +0200 |
| commit | 51d43fc9c5aab428d589b602759476d716fbea6e (patch) | |
| tree | f34c04ce843bc18cb0c85923489d5d51b5ae8eef /src/arch/x86/romcc_console.c | |
| parent | 30461a91977d6770bb3ec6c378a21afe2616f3d7 (diff) | |
soc/intel/apollolake: Add lpss dsdt entry
Add southbridge and LPSS device DSDT table.
Change-Id: I0607398408900d8c5d543ecd5e5d4830d2a70bf1
Signed-off-by: Zhao, Lijian <lijian.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/14218
Tested-by: build bot (Jenkins)
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Diffstat (limited to 'src/arch/x86/romcc_console.c')
0 files changed, 0 insertions, 0 deletions