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authorMoritz Fischer <moritzf@google.com>2021-02-18 14:43:20 -0800
committerron minnich <rminnich@gmail.com>2021-02-19 19:08:29 +0000
commitc73102d0f51c7e83c4a1723acf08bf92ecaff603 (patch)
tree74170460715c169917a6fe0afbea1ca08098dd71 /src/arch/x86/rdrand.c
parentd8f352b4fd0e260494fdb14d04b73b11607bee9d (diff)
soc/rockchip/rk3399/sdram: Add phy_ctrl_reset
Add support for resetting PHY PCTRL for both channel 0 and 1. On the ROCKPro64 board this allows getting past a pctl_cfg() failure. Signed-off-by: Moritz Fischer <moritzf@google.com> Change-Id: I9f807e318ffc63c568d04518c3edd02c1064e185 Reviewed-on: https://review.coreboot.org/c/coreboot/+/50890 Reviewed-by: ron minnich <rminnich@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/arch/x86/rdrand.c')
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