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authorArthur Heymans <arthur@aheymans.xyz>2017-08-29 08:30:43 +0200
committerMartin Roth <martinroth@google.com>2017-09-22 13:09:10 +0000
commitfd440bb79eedf36fdd27d26801146a2ecb5218a3 (patch)
tree9acacf8f3dac687fb915ad2830bd086b46df03a2 /src/arch/x86/prologue.inc
parent1dce59044795613d957ad59d7faac41ff46ea754 (diff)
mb/asrock/g41c-gs: Fix the SATA clock output on ck505
With reset default of the clockgen on this board the SATA clock which needs to be 100MHz depends on FSB BSEL straps. This explains why SATA was originally tested to be working but fails with CPUs operating at different FSB. This change sets a bit in the clockgen configuration which fixes the SATA clock. TESTED on with a 1333MHz FSB CPU. Change-Id: Ic2b8ca91920f015ae3265871bc092023302fefdc Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/21257 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Diffstat (limited to 'src/arch/x86/prologue.inc')
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