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authorMartin Roth <martin@coreboot.org>2020-06-17 13:44:59 -0600
committerMichał Żygowski <michal.zygowski@3mdeb.com>2020-06-19 09:38:59 +0000
commit87f9fc8584c980dc4c73667f4c88d71d0e447a0c (patch)
tree8d5377c4610456b90c21f9f119c6484357cb3703 /src/arch/x86/mmap_boot.c
parent4cb2f7684e6ec746d7de1b51f9c86935f9d3d64f (diff)
mb/pcengines/apu2: Update GPIO Reads & writes
The APU2 was using the soc/amd/common functions to do GPIO reads and writes. The functions that were being used are getting eliminated in the SOC directory, but since the APU isn't using the rest of that code (as it's not using the rest of the SOC codebase), it proved to be problematic to use the updated functions. The solution I've put in place here is to pull everything needed for the GPIO reads & writes into the gpio_ftns.c & h files. Signed-off-by: Martin Roth <martin@coreboot.org> Change-Id: Ied39c114bdf3637977d21f56fd7db428c52e4706 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42484 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Michał Żygowski <michal.zygowski@3mdeb.com>
Diffstat (limited to 'src/arch/x86/mmap_boot.c')
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